MSP430F673x
MSP430F672x
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SLAS731A –DECEMBER 2011–REVISED APRIL 2012
eUSCI (I2C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 17)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
Internal: SMCLK, ACLK
External: UCLK
feUSCI
eUSCI input clock frequency
fSYSTEM MHz
Duty cycle = 50% ± 10%
fSCL
SCL clock frequency
2 V/3 V
2 V/3 V
0
5.1
1.5
5.1
1.4
0.4
5.0
1.3
5.2
1.7
75
400 kHz
µs
fSCL = 100 kHz
fSCL > 100 kHz
fSCL = 100 kHz
fSCL > 100 kHz
tHD,STA
Hold time (repeated) START
tSU,STA
tHD,DAT
tSU,DAT
Setup time for a repeated START
Data hold time
2 V/3 V
µs
µs
µs
2 V/3 V
2 V/3 V
2 V/3 V
fSCL = 100 kHz
fSCL > 100 kHz
fSCL = 100 kHz
fSCL > 100 kHz
UCGLITx = 0
UCGLITx = 1
UCGLITx = 2
UCGLITx = 3
UCCLTOx = 1
UCCLTOx = 2
UCCLTOx = 3
Data setup time
tSU,STO
Setup time for STOP
2 V/3 V
µs
220
120
60
ns
ns
35
Pulse duration of spikes suppressed by input
filter
tSP
2 V/3 V
30
ns
20
35
ns
30
33
37
ms
ms
ms
tTIMEOUT
Clock low timeout
2 V/3 V
tHD,STA
tSU,STA
tHD,STA
tBUF
SDA
tLOW
tHIGH
tSP
SCL
tSU,DAT
tSU,STO
tHD,DAT
Figure 17. I2C Mode Timing
LCD_C - Recommended Operating Conditions
PARAMETER
CONDITIONS
MIN
NOM
MAX UNIT
Supply voltage range, charge
pump enabled, VLCD ≤ 3.6 V
LCDCPEN = 1, 0000 < VLCDx ≤ 1111
(charge pump enabled, VLCD ≤ 3.6 V)
VCC,LCD_C,CP en,3.6
VCC,LCD_C,CP en,3.3
VCC,LCD_C,int. bias
VCC,LCD_C,ext. bias
2.2
3.6
3.6
3.6
3.6
V
V
V
V
Supply voltage range, charge
pump enabled, VLCD ≤ 3.3 V
LCDCPEN = 1, 0000 < VLCDx ≤ 1100
(charge pump enabled, VLCD ≤ 3.3 V)
2.0
2.4
2.4
Supply voltage range, internal
biasing, charge pump disabled
LCDCPEN = 0, VLCDEXT = 0
LCDCPEN = 0, VLCDEXT = 0
Supply voltage range, external
biasing, charge pump disabled
Supply voltage range, external
LCD voltage, internal or external
biasing, charge pump disabled
VCC,LCD_C,VLCDEXT
LCDCPEN = 0, VLCDEXT = 1
2.0
2.4
3.6
3.6
V
V
External LCD voltage at
LCDCAP/R33, internal or external LCDCPEN = 0, VLCDEXT = 1
biasing, charge pump disabled
VLCDCAP/R33
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