MSP430F663x
SLAS566C –JUNE 2010–REVISED AUGUST 2012
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Table 52. USB Configuration Registers (Base Address: 0900h)
REGISTER DESCRIPTION
REGISTER
USBKEYID
OFFSET
USB key/ID
00h
02h
04h
08h
0Ah
10h
12h
14h
USB module configuration
USB PHY control
USBCNF
USBPHYCTL
USBPWRCTL
USBPWRVSR
USBPLLCTL
USBPLLDIV
USBPLLIR
USB power control
USB power voltage setting
USB PLL control
USB PLL divider
USB PLL interrupts
Table 53. USB Control Registers (Base Address: 0920h)
REGISTER DESCRIPTION
REGISTER
IEPCNF_0
OFFSET
Input endpoint#0 configuration
Input endpoint #0 byte count
Output endpoint#0 configuration
Output endpoint #0 byte count
Input endpoint interrupt enables
Output endpoint interrupt enables
Input endpoint interrupt flags
Output endpoint interrupt flags
USB interrupt vector
00h
01h
02h
03h
0Eh
0Fh
10h
11h
12h
16h
18h
1Ah
1Ch
1Dh
1Eh
1Fh
IEPCNT_0
OEPCNF_0
OEPCNT_0
IEPIE
OEPIE
IEPIFG
OEPIFG
USBIV
USB maintenance
MAINT
Time stamp
TSREG
USBFN
USBCTL
USBIE
USB frame number
USB control
USB interrupt enables
USB interrupt flags
USBIFG
FUNADR
Function address
Table 54. LCD_B Registers (Base Address: 0A00h)
REGISTER DESCRIPTION
REGISTER
LCDBCTL0
OFFSET
LCD_B control register 0
LCD_B control register 1
LCD_B blinking control register
LCD_B memory control register
LCD_B voltage control register
LCD_B port control register 0
LCD_B port control register 1
LCD_B port control register 2
LCD_B charge pump control register
LCD_B interrupt vector word
LCD_B memory 1
000h
002h
004h
006h
008h
00Ah
00Ch
00Eh
012h
01Eh
020h
021h
⋮
LCDBCTL1
LCDBBLKCTL
LCDBMEMCTL
LCDBVCTL
LCDBPCTL0
LCDBPCTL1
LCDBPCTL2
LCDBCTL0
LCDBIV
LCDM1
LCD_B memory 2
LCDM2
⋮
⋮
LCD_B memory 22
LCDM22
LCDBM1
LCDBM2
⋮
035h
040h
041h
⋮
LCD_B blinking memory 1
LCD_B blinking memory 2
⋮
44
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