GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP
SLWS137A
4.0
CONTROL REGISTERS
The chip is configured and controlled through the use of 14 sixteen bit control registers. These
registers are accessed for reading or writing using the control bus pins (CS, R/W, A[0:8], and C[0:15])
described in the previous section. The register names and their addresses are:
ADDRESS
NAME
ADDRESS
NAME
0
1
2
3
4
5
6
7
MODE_REG
SYNC_REG0
SYNC_REG1
DELAY_REG
COUNTER_REG0
PLL_REG
8
9
OUTPUT_REGA
OUTPUT_REGB
OUTPUT_REGC
OUTPUT_REGD
SNAP_REG
10
11
12
13
14
15
PHASE_REG
ONE_SHOT
FREQ_REG0
FREQ_REG1
TEST_OUT
16
17
18
19
DC_I_IN
DC_Q_IN
DC_I_OUT
DC_Q_OUT
20 to 255
unused
256 to 511
256 to 511
Snapshot memory (read only)
Phase Error memory (write only)
The DC offset registers contain two’s complement values. Only the 12 LSBs are used.
The following sections describe each of these registers. The type of each register bit is either R or
R/W indicating whether the bit is read only or read/write. All bits are active high.
Suggested default settings for using the chip in carrier removal applications is given for each
register.
Texas Instruments Incorporated
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This document contains information which may be changed at any time without notice
TI [ TEXAS INSTRUMENTS ]
