7.2.4 False Carrier Sense Counter Register (FCSCR)
This counter provides information required to implement the “False Carriers” attribute within the MAU managed object
class of Clause 30 of the IEEE 802.3u specification.
Table 24. False Carrier Sense Counter Register (FCSCR), address 0x14
Bit
15:8
7:0
Bit Name
RESERVED
FCSCNT[7:0]
Default
0, RO
Description
RESERVED: Writes ignored, Read as 0
False Carrier Event Counter:
0, RO / COR
This 8-bit counter increments on every false carrier event. This
counter sticks when it reaches its max count (FFh).
7.2.5 Receiver Error Counter Register (RECR)
This counter provides information required to implement the “Symbol Error During Carrier” attribute within the PHY man-
aged object class of Clause 30 of the IEEE 802.3u specification.
Table 25. Receiver Error Counter Register (RECR), address 0x15
Bit
15:8
7:0
Bit Name
RESERVED
RXERCNT[7:0]
Default
0, RO
Description
RESERVED: Writes ignored, Read as 0
RX_ER Counter:
0, RO / COR
When a valid carrier is present and there is at least one occurrence
of an invalid data symbol, this 8-bit counter increments for each re-
ceive error detected. This event can increment only once per valid
carrier event. If a collision is present, the attribute will not incre-
ment. The counter sticks when it reaches its max count.
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