7.2.6 100 Mb/s PCS Configuration and Status Register (PCSR)
Table 26. 100 Mb/s PCS Configuration and Status Register (PCSR), address 0x16
Bit
15:13
12
Bit Name
RESERVED
RESERVED
Default
<00>, RO
0
Description
RESERVED: Writes ignored, Read as 0.
RESERVED:
Must be zero.
11
10
RESERVED
TQ_EN
0
RESERVED:
Must be zero.
100Mbs True Quiet Mode Enable:
1 = Transmit True Quiet Mode.
0 = Normal Transmit Mode.
Signal Detect Force PMA:
1 = Forces Signal Detection in PMA.
0 = Normal SD operation.
Signal Detect Option:
0, RW
9
8
7
SD FORCE PMA
SD_OPTION
0, RW
1, RW
0, RW
1 = Enhanced signal detect algorithm.
0 = Reduced signal detect algorithm.
Descrambler Timeout:
DESC_TIME
Increase the descrambler timeout. When set this should allow the
device to receive larger packets (>9k bytes) without loss of syn-
chronization.
1 = 2ms
0 = 722us (per ANSI X3.263: 1995 (TP-PMD) 7.2.3.3e)
RESERVED:
6
5
RESERVED
0
Must be zero.
FORCE_100_OK
0, RW
Force 100Mb/s Good Link:
1 = Forces 100Mb/s Good Link.
0 = Normal 100Mb/s operation.
RESERVED:
4
3
2
RESERVED
RESERVED
0
0
Must be zero.
RESERVED:
Must be zero.
NRZI_BYPASS
0, RW
NRZI Bypass Enable:
1 = NRZI Bypass Enabled.
0 = NRZI Bypass Disabled.
RESERVED:
1
0
RESERVED
RESERVED
0
0
Must be zero.
RESERVED:
Must be zero.
55
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