DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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Table 3-52. Video Input 0 (Digital) Terminal Functions (continued)
SIGNAL NAME [1]
VIN[0]A_D[10]_BD[2]
DESCRIPTION [2]
TYPE [3]
AAR BALL [4]
E16
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
I
VIN[0]A_D[11]_BD[3]
VIN[0]A_D[12]_BD[4]
VIN[0]A_D[13]_BD[5]
VIN[0]A_D[14]_BD[6]
VIN[0]A_D[15]_BD[7]
VIN[0]A_D[8]_BD[0]
VIN[0]A_D[9]_BD[1]
VIN[0]A_FLD
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
I
I
I
I
I
I
I
I
I
I
H17
J16
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
H16
F13
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
H13
B16
C16
B4, J13
D13
C13
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
Video Input 0 Data inputs. For 16-bit capture, D[15:8] are
Y Port A inputs. For 8-bit capture, D[15:8] are Port B
YCbCr data inputs. For RGB capture, D[15:8] are G data
inputs.
Video Input 0 Port A Field ID input. Discrete field
identification signal for Port A RGB capture mode or
YCbCr capture without embedded syncs (BT.601
modes).
VIN[0]A_HSYNC
Video Input 0 Port A Horizontal Sync0 input. Discrete
horizontal synchronization signal for Port A RGB capture
mode or YCbCr capture without embedded syncs
(BT.601 modes).
VIN[0]A_VSYNC
Video Input 0 Port A Vertical Sync0 input. Discrete
vertical synchronization signal for Port A RGB capture
mode or YCbCr capture without embedded syncs
(BT.601 modes).
VIN[0]B_CLK
VIN[0]B_DE
VIN[0]B_FLD
Video Input 0 Port B Clock input. Input clock for 8-bit Port
B video capture. This signal is not used in 16-bit and 24-
bit capture modes.
I
I
I
H12
C5
Video Input 0 Port B Data Enable input. Discrete data
valid signal for Port B RGB capture mode or YCbCr
capture without embedded syncs (BT.601 modes).
Video Input 0 Port B Field ID input. Discrete field
identification signal for Port B 8-bit YCbCr capture without
embedded syncs (BT.601 modes). Not used in RGB or
16-bit YCbCr capture modes.
A3
VIN[0]B_HSYNC
VIN[0]B_VSYNC
Video Input 0 Port B Horizontal Sync input. Discrete
horizontal synchronization signal for Port B 8-bit YCbCr
capture without embedded syncs (BT.601 modes). Not
used in RGB or 16-bit YCbCr capture modes.
I
I
C12
J13
Video Input 0 Port B Vertical Sync1 input. Discrete
vertical synchronization signal for Port B 8-bit YCbCr
capture without embedded syncs (BT.601 modes). Not
used in RGB or 16-bit YCbCr capture modes.
98
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