DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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GPMC_FCLK
GPMC_CLK
6
6
2
2
GPMC_CS[x]
17
10
10
11
GPMC_A[10:1]
GPMC_BE1
Address 2
1
Address 1
1
11
11
11
1
1
GPMC_BE0_CLE
GPMC_ADV_ALE
4
4
13
13
5
5
14
14
GPMC_OE
GPMC_D[15:0]
Data Upper
GPMC_WAIT[x]
Figure 8-28. GPMC/Non-Multiplexed NOR Flash - Asynchronous Read - 32-Bit Access Timing
GPMC_FCLK
GPMC_CLK
22
21
21
21
2
GPMC_CS[x]
10
11
GPMC_A[10:1]
Add0
Add1
Add2
Add3
Add4
1
1
GPMC_BE1
11
GPMC_BE0_CLE
GPMC_ADV_ALE
13
19
14
GPMC_OE
GPMC_D[15:0]
D0
D1
D2
D3
D3
GPMC_WAIT[x]
Figure 8-29. GPMC/Non-Multiplexed Only NOR Flash - Asynchronous Read - Page Mode 4x16-Bit Timing
192
Peripheral Information and Timings
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