DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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GPMC_FCLK
GPMC_CLK
GPMC_CS[x]
2
10
Address (MSB)
1
GPMC_A[26:17]
11
GPMC_BE1
11
1
GPMC_BE0_CLE
13
4
GPMC_ADV_ALE
28
26
GPMC_WE
30
29
GPMC_A[16:1]
GPMC_D[15:0]
Valid Address (LSB)
Data OUT
GPMC_WAIT[x]
Figure 8-32. GPMC/Multiplexed NOR Flash - Asynchronous Write - Single Word Timing
194
Peripheral Information and Timings
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