DAC8571
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SLAS373A–DECEMBER 2002–REVISED JULY 2003
THEORY OF OPERATION (continued)
DRIVING RESISTIVE AND CAPACITIVE LOADS
The DAC8571 output stage is capable of driving loads of up to 1000 pF while remaining stable. Within the offset
and gain error margins, the DAC8571 can operate rail-to-rail when driving a capacitive load. Resistive loads of 2
kΩ can be driven by the DAC8571 while achieving a very good load regulation. Load regulation error increases
when the DAC output voltage is close to supply rails. When the outputs of the DAC are driven to the positive rail
under resistive loading, the PMOS transistor of each Class-AB output stage can enter into the linear region.
When this occurs, the added IR voltage drop deteriorates the linearity performance of the DAC. This only occurs
within approximately the top 20 mV of the DAC’s digital input-to-voltage output transfer characteristic. The
reference voltage applied to the DAC8571 may be reduced below the supply voltage applied to VDD in order to
eliminate this condition if good linearity is a requirement at full scale (under resistive loading conditions).
AC PERFORMANCE
DAC8571 can achieve typical ac performance of 96-dB signal-to-noise ratio (SNR) and 65-dB total harmonic
distortion (THD), making the DAC8571 a solid choice for applications requiring low SNR at output frequencies at
or below 4 kHz.
OUTPUT VOLTAGE STABILITY
The DAC8571 exhibits excellent temperature stability of 5 ppm/°C typical output voltage drift over the specified
temperature range of the device. This enables the output voltage of each channel to stay within a ±25 µV window
for a ±1°C ambient temperature change. Good power supply rejection ratio (PSRR) performance reduces supply
noise present on VDD from appearing at the outputs to well below 10 µV. Combined with good dc noise
performance and true 16-bit differential linearity, the DAC8571 becomes a perfect choice for closed-loop control
applications.
SETTLING TIME AND OUTPUT GLITCH PERFORMANCE
Settling time to within the 16-bit accurate range of the DAC8571 is achievable within 10 µs for a full-scale code
change at the input. Worst case settling times between consecutive code changes is typically less than 2 µs,
therefore, the update rate is limited by the I2C interface for digital input signals changing code-to-code. For
full-scale output swings, the output stage of each DAC8571 channel typically exhibits less than 100-mV
overshoot and undershoot when driving a 200-pF capacitive load. Code-to-code change glitches are extremely
low (~10µV) given that the code-to-code transition does not cross an Nx4096 code boundary. Due to internal
segmentation of the DAC8571, code-to-code glitches occur at each crossing of an Nx4096 code boundary.
These glitches can approach 100 mVs for N = 15, but settle out within ~2 µs.
USING REF02 AS A POWER SUPPLY FOR DAC8571
Due to the extremely low supply current required by the DAC8571, a possible configuration is to use a REF02
5-V precision voltage reference to supply the required voltage to the DAC8571’s supply input as well as the
reference input, as shown in Figure 33. This is especially useful if the power supply is quite noisy or if the system
supply voltages are at some value other than 5 V. The REF02 outputs a steady supply voltage for the DAC8571.
If the REF02 is used, the current it needs to supply to the DAC8571 is 160-µA typical and 225-µA max for VDD
=
5 V. When a DAC output is loaded, the REF02 also needs to supply the current to the load. The total typical
current required (with a 5-kΩ load on a given DAC output) is:
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