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CDC536DBR 参数 Datasheet PDF下载

CDC536DBR图片预览
型号: CDC536DBR
PDF下载: 下载PDF文件 查看货源
内容描述: 具有三态输出的3.3V锁相环时钟驱动器 [3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS]
分类和应用: 时钟驱动器逻辑集成电路光电二极管输出元件信息通信管理
文件页数/大小: 14 页 / 295 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CDC536  
www.ti.com  
SCAS378GAPRIL 1994REVISED JULY 2004  
SWITCHING CHARACTERISTICS  
over recommended ranges of supply voltage and operating free-air temperature, CL = 30 pF (see (1) and Figure 1 and  
Figure 2)  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX UNIT  
fmax  
Duty cycle  
100  
45%  
500  
MHz  
55%  
Y
Y
Y
(2)  
tphase error  
CLKIN↑  
CLKIN↑  
+500  
200  
0.5  
1
ps  
ps  
ns  
ns  
ns  
ns  
Jitter(pk-pk)  
(2)  
tsk(o)  
tsk(pr)  
tr  
tf  
1.4  
1.4  
(1) The specifications for parameters in this table are applicable only after any appropriate stabilization time has elapsed.  
(2) The propagation delay, tphase error, is dependent on the feedback path from any output to FBIN. The tphase error, tsk(o), and tsk(pk)  
specifications are only valid for equal loading of all outputs.  
PARAMETER MEASUREMENT INFORMATION  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
t
phase error  
From Output  
Under Test  
V
V
OH  
2 V  
0.8 V  
2 V  
Output  
500 W  
1.5 V  
0.8 V  
C
= 30 pF  
L
OL  
(see note A)  
t
r
t
f
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
LOAD CIRCUIT FOR OUTPUTS  
A. NOTES: . CL includes probe and jig capacitance.  
B. All input pulses are supplied by generators having the following characteristics: PRR100 MHz, ZO = 50 , tr2.5 ns,  
tf2.5 ns.  
C. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
6
 
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