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CC1110F32RHHR 参数 Datasheet PDF下载

CC1110F32RHHR图片预览
型号: CC1110F32RHHR
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器,低于1GHz的射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, Sub-1 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 249 页 / 3133 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CC1110Fx / CC1111Fx  
12.11 Random Number Generator  
12.11.1 Introduction  
The random number generator is a 16-bit  
Linear Feedback Shift Register (LFSR) with  
The random number generator has the  
following features.  
X16 X15 X 2  
polynomial  
(i.e. CRC16).  
1
It uses different levels of unrolling depending  
on the operation it performs. The basic version  
(no unrolling) is shown below.  
Generate pseudo-random bytes which  
can be read by the CPU.  
Calculate CRC16 of bytes that are  
written to RNDH.  
The random number generator is turned off  
when ADCCON1.RCTRL=11.  
Seeded by value written to RNDL.  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
+
+
in_bit  
+
Figure 40: Basic Structure of the Random Number Generator  
Number Generator 12.11.2.3 CRC16  
12.11.2 Random  
Operation  
The LFSR can also be used to calculate the  
CRC value of a sequence of bytes. Writing to  
The operation of the random number generator  
is controlled by the ADCCON1.RCTRLbits. The  
current value of the 16-bit shift register in the  
LFSR can be read from the RNDH and RNDL  
registers.  
the RNDH register will trigger  
a
CRC  
calculation. The new byte is processed from  
the MSB end and an 8x unrolling is used, so  
that a new byte can be written to RNDH every  
clock cycle.  
Note that the LFSR must be properly seeded  
by writing to RNDL twice, before the CRC  
calculations start. Usually the seed value  
should be 0x0000 or 0xFFFF. Using 0xFFFF  
as seed value will give the CRC used by the  
radio.  
12.11.2.1 Semi Random Sequence  
Generation  
To  
generate  
pseudo-random  
bytes,  
ADCCON1.RCTRLshould be set to 01. This will  
clock the LFSR once (13x unrolling) and the  
ADCCON1.RCTRL bits will automatically be  
cleared when the operation has completed.  
For the following byte sequence:  
0x03, 0x41, 0x42, 0x43  
12.11.2.2 Seeding  
The CRC will be 0xB4BC when using 0xFFFF  
as seed value.  
The LFSR can be seeded by writing to the  
RNDL register twice. Each time the RNDL  
register is written, the 8 LSB of the LFSR is  
copied to the 8 MSB and the 8 LSBs are  
replaced with the new data byte that was  
written to RNDL.  
12.11.3 Registers  
The random number generator registers are  
described in this section.  
SWRS033H  
Page 147 of 246  
 
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