AM6548, AM6528, AM6526
ZHCSLA7B –DECEMBER 2019 –REVISED JUNE 2021
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7.9.2 Power Supply Sequencing
This section describes the power-up sequence required to ensure proper device operation. The power supply
names described in this section comprise a superset of a family of compatible devices. Some members of this
family will not include a subset of these power supplies and their associated device modules.
Note
All timing requirements and switching characteristics in 节 7.9.3 should be strictly followed unless
otherwise specified.
7.9.2.1 Power Supply Slew Rate Requirement
To maintain the safe operating range of the internal ESD protection devices, TI recommends limiting the
maximum slew rate of supplies to be less than 100 mV/μs. For instance, as shown in 图 7-2, TI recommends
having the supply ramp slew for a 1.8-V supply of more than 18 μs.
图7-2 describes the Power Supply Slew Rate Requirement of the device.
Supply value
t
slew rate < 100 mV/µs
slew > (supply value) / (100 mV/µs)
or
supply value x 10 µs
SPRSP08_ELCH_06
图7-2. Power Supply Slew and Slew Rate
7.9.2.2 VDDA_1P8_SERDES0 Supply Slew Rate Requirement
To maintain the safe operating range of the internal ESD protection devices, TI recommends limiting the
maximum slew rate of VDDA_1P8_SERDES0 supplies to be less than 40 mV/μs. For instance, as shown in 图
7-3, TI recommends having the supply ramp slew for a 1.8-V supply of more than 45 μs.
图7-3 describes the VDDA_1P8_SERDES0 Supply Slew Rate Requirement of the device.
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