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ZHCSLA7B –DECEMBER 2019 –REVISED JUNE 2021
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7.6.5.1 LVCMOS Buffers DC Electrical Characteristics
over recommended operating conditions (unless otherwise noted)(1)
PARAMETER
SPECIFIC BALL
MIN
TYP
MAX UNI
T
BALL NAMES: ALL LVCMOS IOs as defined in 表6-1, Pin Attributes except those listed in 节7.6.5.1, LVCMOS Buffers DC Electrical
Characteristics
BALL NUMBERS: ALL LVCMOS IOs as defined in 表6-1, Pin Attributes except those listed in 节7.6.5.1, LVCMOS Buffers DC Electrical
Characteristics
1.8-V MODE
VIH
VIL
Input high-level threshold
Input low-level threshold
TCK (AA4)
All other IOs
TCK (AA4)
0.60 × VDDS(1)
0.65 × VDDS(1)
V
V
0.30 ×
VDDS(1)
All other IOs
0.35 ×
VDDS(1)
VIHSS
VILSS
Input high-level Steady State
Input low-level Steady State
0.75 × VDDS(1)
V
V
0.35 ×
VDDS(1)
VHYS
Input hysteresis voltage
TCK (AA4)
400
50
mV
PORz (E19),
MCU_PORz (W5),
MCU_BYP_POR (V5)
All other IOs
100
VDDS(1) - 0.1
VDDS(1) - 0.2
VDDS(1) - 0.3
VDDS(1) - 0.4
VOH
VOL
IIN
Output high-level threshold
Output low-level threshold
IOH = 100µA
IOH = 2mA
IOH = 4mA
IOH = 6mA
IOL = 100µA
IOL = 2mA
IOL = 4mA
IOL = 6mA
V
V
0.1
0.2
0.3
0.4
Input leakage current, pull-up or pull-down
inhibited
11.5 µA
Input leakage current, pull-down enabled, VI =
VDDS(1)
65
64
96
97
153
Input leakage current, pull-up enabled, VI = VSS
154
IOZ
Total leakage current through the driver/receiver
combination, which may include an internal pull-
up or pull-down. This value represents the
maximum current flowing in or out of the pin
while the output driver is disabled, the pull-up or
pull-down is inhibited, and the input is swept
from VSS to VDD.
11.5 µA
3.3-V MODE
TCK (AA4)
2
MMC0_*, MMC1_*
0.625 *
VDDSHVn
VIH
Input high-level threshold
V
All other IOs
2
TCK (AA4)
0.7
MMC0_*, MMC1_*
0.25 *
VDDSHVn
VIL
Input low-level threshold
V
All other IOs
0.8
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