欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADS7864YB/2KG4 参数 Datasheet PDF下载

ADS7864YB/2KG4图片预览
型号: ADS7864YB/2KG4
PDF下载: 下载PDF文件 查看货源
内容描述: [6-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP48, GREEN, PLASTIC, TQFP-48]
分类和应用: 转换器
文件页数/大小: 27 页 / 990 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号ADS7864YB/2KG4的Datasheet PDF文件第9页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第10页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第11页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第12页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第14页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第15页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第16页浏览型号ADS7864YB/2KG4的Datasheet PDF文件第17页  
ADS7864  
www.ti.com  
SBAS141ASEPTEMBER 2000REVISED MARCH 2005  
When the input is differential, the amplitude of the  
input is the difference between the +IN and –IN input,  
or: (+IN) – (–IN). The peak-to-peak amplitude of each  
input is ±1/2VREF around this common voltage. How-  
ever, since the inputs are 180° out of phase, the  
peak-to-peak amplitude of the differential voltage is  
+VREF to –VREF. The value of VREF also determines  
the range of the voltage that may be common to both  
inputs (see Figure 22).  
8000  
7000  
6000  
5000  
4000  
3000  
2000  
1000  
0
In each case, care should be taken to ensure that the  
output impedance of the sources driving the +IN and  
–IN inputs are matched. Otherwise, this may result in  
offset error, which will change with both temperature  
and input voltage.  
2044  
2045  
2046  
2047  
2048  
Code (decimal)  
The input current on the analog inputs depend on a  
number of factors: sample rate, input voltage, and  
source impedance. Essentially, the current into the  
ADS7864 charges the internal capacitor array during  
the sampling period. After this capacitance has been  
fully charged, there is no further input current. The  
source of the analog input voltage must be able to  
charge the input capacitance (15pF) to a 12-bit  
settling level within two clock cycles. When the  
converter goes into the hold mode, the input im-  
pedance is greater than 1G.  
Figure 23. Histogram of 8,000 Conversions of a  
DC Input  
1.4V  
3k  
DATA  
Care must be taken regarding the absolute analog  
input voltage. The +IN and –IN inputs should always  
Test Point  
100pF  
CLOAD  
remain within the range of GND – 300mV to VDD  
300mV.  
+
VOH  
VOL  
DATA  
TRANSITION NOISE  
Figure 23 shows a histogram plot for the ADS7864  
following 8,000 conversions of a DC input. The DC  
input was set at output code 2046. All but one of the  
conversions had an output code result of 2046 (one  
of the conversions resulted in an output of 2047). The  
histogram reveals the excellent noise performance of  
the ADS7864.  
tR  
tF  
Voltage Waveforms for DATA Rise and Fall Times tR, and tF.  
Figure 24. Test Circuits for Timing Specifications  
13