ADS131M04-Q1
ZHCSOL7A –MARCH 2022 –REVISED AUGUST 2022
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表8-12. Register Map (continued)
BIT 15
BIT 7
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 2
BIT 9
BIT 1
BIT 8
BIT 0
RESET
VALUE
ADDRESS
REGISTER
BIT 6
BIT 5
BIT 4
BIT 3
PHASE3[9:2]
RESERVED
OCAL3_MSB[15:8]
18h
CH3_CFG
0000h
0000h
0000h
8000h
0000h
PHASE3[1:0]
DCBLK3_DIS0
MUX3[1:0]
19h
1Ah
1Bh
1Ch
CH3_OCAL_MSB
CH3_OCAL_LSB
CH3_GCAL_MSB
CH3_GCAL_LSB
OCAL3_MSB[7:0]
OCAL3_LSB[7:0]
RESERVED
GCAL3_MSB[15:8]
GCAL3_MSB[7:0]
GCAL3_LSB[7:0]
RESERVED
REGISTER MAP CRC AND RESERVED REGISTERS
REG_CRC[15:8]
REG_CRC[7:0]
RESERVED
3Eh
3Fh
REGMAP_CRC
RESERVED
0000h
0000h
RESERVED
Complex bit access types are encoded to fit into small table cells. 表 8-13 shows the codes that are used for
access types in this section.
表8-13. Access Type Codes
Access Type
Code
R
Description
Read Type
R
Read
Write Type
W
W
Write
Reset or Default Value
-n
Value after reset or the default value
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