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THCV231-Q 参数 Datasheet PDF下载

THCV231-Q图片预览
型号: THCV231-Q
PDF下载: 下载PDF文件 查看货源
内容描述: [SerDes transmitter and receiver with bi-directional transceiver]
分类和应用:
文件页数/大小: 58 页 / 1447 K
品牌: THINE [ THINE ELECTRONICS, INC. ]
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THCV231-Q_THCV236-Q_Rev.2.60_E  
Supply Current  
Table 44. Supply Current(THCV231-Q)  
Symbol  
Parameter  
Condition(*1)  
Min  
Typ  
Max  
Unit  
ITCCW  
Transmitter Supply Current  
PDN=1, HFSEL=1  
PDN = 0  
All Inputs = Fixed 0 or 1  
Typical value is under 25 °C  
-
-
115  
mA  
Transmitter Power Down Supply  
Current  
ITCCS  
-
2.5  
20  
mA  
*1 HFSEL is a register.  
Table 45. Supply Current(THCV236-Q)  
Symbol  
Parameter  
Condition  
Cload=8pF,  
PDN0=1,PDN1=1,HFSEL=1  
PDN0 = 0 and PDN1 =0  
All Inputs = Fixed 0 or 1  
Typical value is under 25 °C  
Min  
Typ  
Max  
Unit  
IRCCW  
Receiver Supply Current  
-
-
220  
mA  
Receiver Power Down Supply  
Current  
IRCCS  
-
2.5  
20  
mA  
Switching Characteristics  
Table 46. Switching Characteristics (THCV231-Q)  
Symbol  
tTRF  
Parameter  
CML Output Rise and Fall Time  
(20%-80%)  
Condition(*1)  
Min  
Typ  
Max  
Unit  
ps  
-
50  
-
150  
tTCIP  
tTCH  
CLKIN Period  
CLKIN High Time  
See Table 16  
-
1000/Freq.Range[MHz]  
ns  
0.35×tTCI  
0.65×tTCI  
0.5×tTCIP  
0.5×tTCIP  
ns  
P
P
CLKIN Low Time  
0.35×tTCI  
0.65×tTCI  
tTCL  
-
ns  
P
2.0  
1.0  
0
P
-
-
-
tTS  
tTH  
tTPD  
Data Input Setup to CLKIN  
Data Input Hold to CLKIN  
Power On to PDN High Delay  
-
-
-
-
-
-
ns  
ns  
ns  
MAINMODE=1,  
HFSEL=0  
MAINMODE=1,  
HFSEL=1  
-
56×tTCIP  
-
65×tTCIP  
ns  
Input Clock to Output Data  
Delay  
tTCD  
109×tTCIP  
-
-
-
132×tTCIP  
ns  
ms  
ns  
tTPLL0  
tTPLL1  
PDN High to CML Output Delay  
PDN Low to CML Output High  
Fix Delay  
LOCKN High to Training  
Pattern Output Delay  
LOCKN Low to Data Pattern  
Output Delay  
-
-
10  
20  
-
-
-
tTNP0  
tTNP1  
-
-
-
-
10  
10  
ms  
ms  
*1 MAINMODE and HFSEL are registers.  
Copyright©2017 THine Electronics, Inc.  
THine Electronics, Inc.  
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