73S8009CN Data Sheet
DS_8009CN_001
3.2 Power Supply and Converter
The 73S8009CN power supply and converter circuitry takes power from the VPC input pin. The power
supplied to VPC pin is converted to the voltage VP utilizing an inductive, step-up converter. A series power
inductor (nominal value = 10µH) is connected from pin VPC to pin LIN, and a 10µF and a 0.1µF filter
capacitor must be connected to VPC. Note: When the VPC input voltage exceeds the nominal VP voltage
(approximately 5.5V), the switching operation of the converter stops and the converter acts as a pass
through for VPC to VP. Switching operation will automatically resume when VPC falls below the nominal VP
voltage.
VP requires a 4.7µF filter capacitor and will have a nominal value of 5.5 volts during normal operation. VP
is used by the smart card interface circuits (CLK, RST, I/O, AUX1, and AUX2) and is the source of the
regulated smart card supply VCC. VCC can be selected for values of 5V, 3V, and 1.8V.
The power supply output VDD is also produced from VP. VDD is used by the 73S8009CN circuit for logic,
input / output buffering with the host. In addition, VDD can be used as a 3.3V regulated power supply for
some external circuitry provided that no more than 40mA is needed (simultaneously to the 65mA current
drawn from VCC).
3.3 Interface Function - ON/OFF Modes
A power ON/OFF function is provided such that the circuit will be inoperative during the “OFF” state,
consuming minimum current from VPC.
Option 1: 73S8009CN supplies host/system power controlled by push button ON/OFF switch:
Refer to Figure 3 for a typical electrical schematic when using an ON/OFF system switch.
The ON/OFF pin shall be connected to an SPST switch to ground. If the circuit is OFF and the switch is
closed for a de-bounce period of approximately 100ms, the circuit shall go into the “ON” state wherein all
functions are operating in normal fashion. If the circuit is in the “ON” state and the ON/OFF pin is
connected to ground for a period greater than the de-bounce period, OFF_REQ will be asserted high and
held regardless of the state of ON/OFF. Typically, the OFF_REQ signal is presented to a host controller
that will assert OFF_ACK high when it has completed all shutdown activities. When OFF_ACK is set
high, the circuit will de-activate the smart card interface if required and turn off all analog functions and
the VDD supply for the logic and companion circuits. The OFF_ACK pin is connected internally to
OFF_REQ with a resistor such that if OFF_ACK is unconnected, the action of OFF_REQ will assert
OFF_ACK high. In this configuration, the circuit shall go into the “OFF” state immediately if the interface
is deactivated or immediately after deactivation if previously activated.. The default state upon application
of power to VPC is the “OFF”. Note that at any time, the controller may assert OFF_ACK and the
73S8009CN will go into the “OFF” state (regardless of activity on the ON/OFF main system switch).
Option 2: ON/OFF status driven from the host processor (no system switch):
Refer to Figure 4 for a typical electrical schematic when controlling the ON/OFF pin via host control.
The ON/OFF pin can be connected to a host digital control signal to turn the 73S8009CN on or off. The
host should monitor the VDD supply to determine when the switch debounce time has been achieved so
the 73S8009CN can switch states (ON or OFF). When the 73S8009CN is OFF, the host should drive the
ON/OFF pin low to initiate the turn ON process. The signal must remain low until the VDD supply voltage
goes to 3.3V. The 73S8009CN is now ON and the ON/OFF pin should be driven back high. To turn off
the 73S8009CN, the host should drive the ON/OFF signal low until the VDD supply goes to 0V. The
73S8009CN is now OFF and the ON/OFF pins should be driven back high. See Note 6.
16
Rev. 1.4
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
