71M6403
Electronic Trip Unit
SEPTEMBER 2006
Comparators (V2, INEUTRAL)
The 71M6403 includes two programmable comparators that are connected to the V2 (comparator 2) and INEUTRAL
(comparator 3) pins. The I/O RAM register COMP_INT (0x2003[4:3]) allows the user to determine if comparators 2 and 3 will
trigger an interrupt to the MPU. The output of each comparator is available in the COMPSTAT register. VBIAS is used as the
threshold, and built-in hysteresis prevents each comparator from repeatedly responding to low-amplitude noise.
Comparators 2 and 3 can be used for early warning of power faults, or for monitoring of battery or other DC voltages. If they are
both selected to interrupt the MPU, their outputs will be XORed together. The voltage at INEUTRAL is also available to the ADC
in the AFE, but the comparator should not be used when INEUTRAL is used for analog measurements.
LCD Drivers
The 71M6403 contains 24 dedicated LCD segment drivers and an additional 18 multi-purpose pins which may be configured as
additional LCD segment drivers (see I/O RAM register LCD_NUM). The 71M6403 is capable of driving between 96 to 168 pixels
of LCD display with 25% duty cycle. At seven segments per digit, the LCD can be designed for 13 to 24 digits for display. Since
each pixel is addressed individually, the LCD display can be a combination of alphanumeric digits and enunciator symbols. The
information to be displayed is written into the lower four bits of I/O RAM registers LCD_SEG0 through LCD_SEG41. Bit 0
corresponds to the segment selected when COM0 pin is active while bit 1 is allocated to COM1.
The LCD driver circuitry is grouped into 4 common outputs (COM0 to COM3) and up to 42 segment outputs (see Table 55). The
typical LCD map is shown below.
SEG0
P0
SEG1
P4
SEG2
P8
SEG3
P12
P13
…
SEG30
P108
P109
P110
P111
…
SEG41
P164
P165
P166
P167
...
...
COM0
COM1
COM2
COM3
P1
P5
P9
…
...
...
...
...
...
P2
P6
P10
P11
P14
P3
P7
P15
Table 55: Liquid Crystal Display Segment Table (Typical)
Note: P0, P1, … Represent the pixel/segment numbers on the LCD.
A charge pump suitable for driving VLCD is included on-chip. This circuit creates 5V from the 3.3V supply. A contrast DAC is
provided that permits the LCD full-scale voltage to be adjusted between VLCD and 70% of VLCD. The LCD_NUM register
defines the number of dual purpose pins used for LCD segment interface.
LCD Voltage Boost Circuitry
A voltage boost circuit may be used to generate 5V from the 3.3V supply to support low-power 5V devices, such as LCDs.
Figure 7 shows a block diagram of the voltage boost circuitry including the voltage regulators for V2P5 and V2P5NV. When
activated using the I/O RAM register LCD_BSTEN (0x2020[7]), the boost circuitry provides an AC voltage at the VDRV output
pin (see the Applications section for details).
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© 2006 TERIDIAN Semiconductor Corporation
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TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
