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71M6403 参数 Datasheet PDF下载

71M6403图片预览
型号: 71M6403
PDF下载: 下载PDF文件 查看货源
内容描述: 电子脱扣器 [Electronic Trip Unit]
分类和应用: 电子
文件页数/大小: 75 页 / 588 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6403  
Electronic Trip Unit  
SEPTEMBER 2006  
On-Chip Resources  
DIO Ports  
The 71M6402 includes up to 22 pins of general purpose digital I/O. 18 of these pins are dual function and can alternatively be  
used as LCD drivers. Figure 6 shows a block diagram of the DIO section.  
On reset or power-up, all DIO pins are inputs until they are configured for the desired direction. The pins are configured and con-  
trolled by the DIO and DIO_DIR registers (SFRs) and by the five bits of the I/O register LCD_NUM (0x2020[4:0]). See the  
description for LCD_NUM in the I/O RAM Section for a table listing the available segment pins versus DIO pins, depending on  
the selection for LCD_NUM. Generally, increasing the value for LCD_NUM will configure an increasing number of general  
purpose pins to be LCD segment pins, starting at the higher pin numbers.  
COM0..3  
LCD DISPLAY  
DRIVER  
SEG6/SRDY  
LCD_EN  
SEG0..2, SEG3/SCLK,  
LCD_FS  
LCD_MODE  
LCD_NUM  
LCD_MODE  
SEG4/SSDATA,  
SEG5/SFR, SEG7..19  
LCD_CLK  
SEG20..23  
SEG24/DIO4 ..  
SEG27/DIO7  
SEG28/DIO8 ..  
DIGITAL I/O  
DIO_EEX  
FAULT_PULSE  
STROBE  
DIO_IN  
SEG31/DIO11  
SEG32/DIO12 ..  
SEG41/DIO21  
DIO_0..3  
DIO_OUT  
LCD_NUM  
DIO_GP  
Figure 6: DIO Ports Block Diagram  
Each pin declared as DIO can be configured independently as an input or output with the bits of the DIO_DIRn registers. Table  
51 lists the direction registers and configurability associated with each group of DIO pins. Table 52 shows the configuration for a  
DIO pin through its associated bit in its DIO_DIR register.  
Direction  
Register  
(SFR)  
Data Re-  
gister  
Direction  
Register  
Name  
Data  
Register  
Name  
Internal resources  
selectable when  
configured as DIO  
MPU  
Port  
DIO Pin Group  
Type  
(SFR)  
Location  
Location  
DIO_0…DIO_3  
DIO 4…DIO7  
DIO 8…DIO11  
DIO 12…DIO15  
DIO 16…DIO21  
DIO only  
Multi-use  
Multi-use  
Multi-use  
Multi-use  
P0  
P0  
P1  
P1  
P2  
0xA2 [3:0]  
0xA2 [7:4]  
0x91 [3:0]  
0x91[7:4]  
0xA1[5:0]  
0x80 [3:0]  
0x80 [7:4]  
0x90 [3:0]  
0x90[7:4]  
0xA0[5:0]  
Yes  
Yes  
Yes  
No  
DIR0  
P0  
DIR1  
DIR2  
P1  
P2  
No  
Table 51: Direction Registers and Internal Resources for DIO Pin Groups  
DIO_DIR bit  
0
1
DIO Pin Function  
input  
output  
Table 52: DIO_DIR Control Bit  
Page: 35 of 75  
© 2006 TERIDIAN Semiconductor Corporation  
REV 1.0  
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