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TSC80251G2D-24CB 参数 Datasheet PDF下载

TSC80251G2D-24CB图片预览
型号: TSC80251G2D-24CB
PDF下载: 下载PDF文件 查看货源
内容描述: 8位/ 16位微控制器,串行通信接口 [8/16-bit Microcontroller with Serial Communication Interfaces]
分类和应用: 微控制器外围集成电路异步传输模式ATM通信时钟
文件页数/大小: 63 页 / 813 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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TSC80251G2D  
Table 33. Summary of unconditional Jump Instructions  
Absolute jump  
Extended jump  
Long jump  
AJMP <src>  
EJMP <src>  
LJMP <src>  
SJMP rel  
(PC) (PC) +2; (PC)  
(PC) (PC) + size (instr); (PC)  
(PC) (PC) + size (instr); (PC)  
src opnd  
10:0  
src opnd  
src opnd  
23:0  
15:0  
Short jump  
(PC) (PC) +2; (PC) (PC) +rel  
Jump indirect  
No operation  
JMP @A +DPTR  
NOP  
(PC)  
(PC) (PC) +1  
FFh; (PC)  
(A) + (DPTR)  
15:0  
23:16  
Binary Mode  
Source Mode  
Mnemonic  
<dest>, <src>(1)  
Comments  
Bytes States Bytes States  
(2)(3)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(3)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(4)  
(2)(4)  
AJMP  
EJMP  
addr11  
addr24  
@DRk  
@WRj  
addr16  
rel  
Absolute jump  
Extended jump  
2
5
3
3
3
2
1
1
3
6
7
6
5
4
5
2
4
2
2
3
2
1
1
3
5
6
5
5
4
5
Extended jump (indirect)  
Long jump (indirect)  
LJMP  
Long jump (direct address)  
Short jump (relative address)  
Jump indirect relative to the DPTR  
No operation (Jump never)  
SJMP  
JMP  
@A +DPTR  
NOP  
1
1
Notes:  
1. A shaded cell denotes an instruction in the C51 Architecture.  
2. In internal execution only, add 1 to the number of states if the destination address is internal and odd.  
3. Add 2 to the number of states if the destination address is external.  
4. Add 3 to the number of states if the destination address is external.  
Table 34. Summary of Call and Return Instructions  
Absolute call  
Extended call  
Long call  
ACALL <src>  
ECALL <src>  
LCALL <src>  
(PC) (PC) +2; push (PC)  
;
15:0  
(PC)  
src opnd  
10:0  
(PC) (PC) + size (instr); push (PC)  
;
;
23:0  
15:0  
(PC)  
src opnd  
23:0  
(PC) (PC) + size (instr); push (PC)  
(PC)  
src opnd  
15:0  
Return from subroutine  
Extended return from subroutine  
Return from interrupt  
RET  
ERET  
RETI  
pop (PC)  
pop (PC)  
IF [INTR= 0] THEN pop (PC)  
15:0  
23:0  
15:0  
IF [INTR= 1] THEN pop (PC) ; pop (PSW1)  
23:0  
Trap interrupt  
TRAP  
(PC) (PC) + size (instr);  
IF [INTR= 0] THEN push (PC)  
15:0  
IF [INTR= 1] THEN push (PSW1); push (PC)  
23:0  
Binary Mode  
Source Mode  
Mnemonic  
<dest>, <src>(1)  
Comments  
Bytes States Bytes States  
(2)(3)  
(2)(3)  
(2)(3)  
(2)(3)  
ACALL  
ECALL  
addr11  
@DRk  
addr24  
@WRj  
addr16  
Absolute subroutine call  
Extended subroutine call (indirect)  
Extended subroutine call  
Long subroutine call (indirect)  
Long subroutine call  
2
3
5
3
3
1
3
1
2
9
2
2
4
2
3
1
2
1
1
9
14  
14  
10  
13  
(2)(3)  
(2)(3)  
(2)(3)  
13  
(2)(3)  
(2)(3)  
(2)  
9
9
LCALL  
(2)(3)  
(2)  
9
RET  
ERET  
RETI  
TRAP  
Notes:  
Return from subroutine  
7
7
(2)  
(2)  
Extended subroutine return  
Return from interrupt  
9
8
(2)(4)  
(2)(4)  
7
7
(4)  
(4)  
Jump to the trap interrupt vector  
12  
11  
1. A shaded cell denotes an instruction in the C51 Architecture.  
2. In internal execution only, add 1 to the number of states if the destination/return address is internal and odd.  
3. Add 2 to the number of states if the destination address is external.  
4. Add 5 to the number of states if INTR= 1.  
27  
Rev. A - May 7, 1999  
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