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TSC80251G2D-24CB 参数 Datasheet PDF下载

TSC80251G2D-24CB图片预览
型号: TSC80251G2D-24CB
PDF下载: 下载PDF文件 查看货源
内容描述: 8位/ 16位微控制器,串行通信接口 [8/16-bit Microcontroller with Serial Communication Interfaces]
分类和应用: 微控制器外围集成电路异步传输模式ATM通信时钟
文件页数/大小: 63 页 / 813 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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TSC80251G2D  
Table 17. Notation for Bit Addressing  
Direct Address  
Description  
C251  
C51  
A directly addressed bit (bit number= 00h-FFh) in memory or an SFR. Bits 00h-7Fh are  
the 128 bits in byte locations 20h-2Fh in the on-chip RAM. Bits 80h-FFh are the 128 bits  
in the 16 SFRs with addresses that end in 0h or 8h, S:80h, S:88h, S:90h,..., S:F0h, S:F8h.  
bit51  
bit  
A directly addressed bit in memory locations 00:0020h-00:007Fh or in any defined SFR.  
Table 18. Notation for Destination in Control Instructions  
Description  
Direct Address  
C251  
C51  
A signed (two’s complement) 8-bit relative address. The destination is -128 to +127 bytes  
relative to the next instruction’s first byte.  
rel  
An 11-bit target address. The target is in the same 2-Kbyte block of memory as the next  
instruction’s first byte.  
addr11  
A 16-bit target address. The target can be anywhere within the same 64-Kbyte region as  
the next instruction’s first byte.  
addr16  
addr24  
A 24-bit target address. The target can be anywhere within the 16-Mbyte address space.  
Table 19. Notation for Register Operands  
Register  
Description  
C251  
C51  
@Ri  
A memory location (00h-FFh) addressed indirectly via byte registers R0 or R1  
Rn  
n
Byte register R0-R7 of the currently selected register bank  
Byte register index: n= 0-7  
Rm  
Rmd  
Byte register R0-R15 of the currently selected register file  
Destination register  
Rms  
m, md, ms  
Source register  
Byte register index: m, md, ms= 0-15  
WRj  
Word register WR0, WR2, ..., WR30 of the currently selected register file  
Destination register  
Source register  
A memory location (00:0000h-00:FFFFh) addressed indirectly through word register WR0-  
WR30, is the target address for jump instructions.  
A memory location (00:0000h-00:FFFFh) addressed indirectly through word register (WR0-  
WR30) + 16-bit signed (two’s complement) displacement value  
Word register index: j, jd, js= 0-30  
WRjd  
WRjs  
@WRj  
@WRj +dis16  
j, jd, js  
DRk  
Dword register DR0, DR4, ..., DR28, DR56, DR60 of the currently selected register file  
Destination register  
Source register  
A memory location (00:0000h-FF:FFFFh) addressed indirectly through dword register DR0-  
DR28, DR56 and DR60, is the target address for jump instruction  
A memory location (00:0000h-FF:FFFFh) addressed indirectly through dword register (DR0-  
DR28, DR56, DR60) + 16-bit (two’s complement) signed displacement value  
Dword register index: k, kd, ks= 0, 4, 8..., 28, 56, 60  
DRkd  
DRks  
@DRk  
@DRk +dis16  
k, kd, ks  
17  
Rev. A - May 7, 1999  
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