DS90UB913Q, DS90UB914Q
www.ti.com
SNLS420B –JULY 2012–REVISED APRIL 2013
Electrical Characteristics(1)(2)(3) (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VOL
IOS
Low Level Output
Voltage
VDDIO = 1.71V to 1.89V Deserializer
GND
0.45
V
IOL = +4 mA
LVCMOS Outputs
Output Short Circuit
Current
VOUT = 0V
Serializer
-11
-17
GPO Outputs
mA
µA
Deserializer
LVCMOS Outputs
IOZ
TRI-STATE® Output
Current
PDB = 0V,
LVCMOS Outputs
-20
+20
VOUT = 0V or VDD
LVCMOS DC SPECIFICATIONS 2.8V I/O (SER INPUTS, GPI, GPO, CONTROL INPUTS AND OUTPUTS)
VIH
High Level Input
Voltage
VIN = 2.52V to 3.08V
0.7 VIN
GND
VIN
0.3 VIN
+20
V
VIL
Low Level Input
Voltage
VIN = 2.52V to 3.08V
IIN
Input Current
VIN = 0V or 3.08V
VIN = 2.52V to 3.08V
-20
±1
µA
V
VOH
VOL
IOS
High Level Output
Voltage
VDDIO = 2.52V to 3.08V
IOH = −4 mA
VDDIO - 0.4
GND
VDDIO
0.4
Low Level Output
Voltage
VDDIO =2.52V to 3.08V Deserializer
IOL = +4 mA
V
LVCMOS Outputs
Output Short Circuit
Current
VOUT = 0V
Serializer
GPO Outputs
-11
-20
mA
µA
Deserializer
LVCMOS Outputs
IOZ
TRI-STATE® Output
Current
PDB = 0V,
VOUT = 0V or VDD
LVCMOS Outputs
-20
+20
CML DRIVER DC SPECIFICATIONS (DOUT+, DOUT-)
Output Differential
Voltage
|VOD
|
RL = 100Ω (Figure 8)
RL = 100Ω
268
340
412
50
mV
mV
V
Output Differential
Voltage Unbalance
ΔVOD
1
VOS
Output Differential
Offset Voltage
RL = 100Ω (Figure 8)
RL = 100Ω
VDD -
VOD/2
ΔVOS
IOS
Offset Voltage
Unbalance
1
50
mV
mA
Ω
Output Short Circuit
Current
DOUT+/- = 0V
-26
RT
Differential Internal
Termination Resistance
Differential across DOUT+ and DOUT-
80
100
120
CML RECEIVER DC SPECIFICATIONS (RIN0+,RIN0–,RIN1+,RIN1– )
Input Current
VIN = VDD or 0V,
VDD = 1.89V
IIN
-20
80
1
+20
120
µA
RT
Differential Internal
Termination Resistance
Differential across RIN+ and RIN-
100
Ω
CML RECEIVER AC SPECIFICATIONS (RIN0+,RIN0–,RIN1+,RIN1– )
Minimum allowable
swing for 1010
pattern(4)
Line Rate = 1.4Gbps (Figure 10)
|Vswing
|
135
mV
CMLMONITOR OUTPUT DRIVER SPECIFICATIONS(CMLOUTP, CMLOUTN)
Differntial Output Eye
Opening
RL = 100Ω
Jitter Frequency>f/40 (Figure 19)
Ew
EH
0.45
200
UI
Differential Output Eye
Height
mV
SER/DES SUPPLY CURRENT *DIGITAL, PLL, AND ANALOG VDD
(4) Specification is ensured by characterization and is not tested in production.
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