CC2430
Peripherals : I/O ports
FCTL (0xAE) – Flash Control
Bit
Name
Reset
R/W
Description
BUSY
7
0
R
Indicates that write or erase is in operation
0
1
No write or erase operation active
Write or erase operation activated
SWBSY
6
0
R
Indicates that current word write is busy; avoid writing to FWDATA
register while this is true
0
1
Ready to accept data
Busy
-
5
4
0
0
R/W
R/W
Not used.
CONTRD
Continuous read enable mode
0
Avoid wasting power; turn on read enables to flash only
when needed
1
Enable continuous read enables to flash when read is to
be done. Reduces internal switching of read enables, but
greatly increases power consumption.
3:2
1
0
0
R/W
Not used.
WRITE
ERASE
R0/W
Write. Start writing word at location given by
FADDRH:FADDRL
.
If ERASEis set to 1, a page erase of the whole page addressed
by FADDRH,is performed before the write.
0
0
R0/W
Page Erase. Erase page that is given by FADDRH[6:1]
FWDATA (0xAF) – Flash Write Data
Bit
Name
Reset
R/W
Description
FWDATA[7:0]
7:0
0x00
R/W
Flash write data. Data written to FWDATAis written to flash when
FCTL.WRITEis set to 1.
FADDRH (0xAD) – Flash Address High Byte
Bit
7
Name
Reset
0
R/W
R/W
R/W
Description
-
Not used
FADDRH[6:0]
6:0
0x00
Page address / High byte of flash word address
Bits 6:1 will select which page to access.
FADDRL (0xAC) – Flash Address Low Byte
Bit
Name
Reset
R/W
Description
FADDRL[7:0]
7:0
0x00
R/W
Low byte of flash word address
FWT (0xAB) – Flash Write Timing
Bit
7:6
5:0
Name
-
Reset
00
R/W
R/W
R/W
Description
Not used
FWT[5:0]
0x2A
Flash Write Timing. Controls flash timing generator.
13.4 I/O ports
peripherals. The usage of the I/O ports is fully
configurable from user software through a set
of configuration registers.
The CC2430 has 21 digital input/output pins
that can be configured as general purpose
digital I/O or as peripheral I/O signals
connected to the ADC, Timers or USART
The I/O ports have the following key features:
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 77 of 211
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