CC2430
Peripherals
:
I/O ports
13.4.6.4
USART0
The SFR register bit PERCFG.U0CFG selects
whether to use alternative 1 or alternative 2
locations.
P2DIR.PRIP0
precedence
peripherals to port 0. When set to 00, USART0
has precedence. Note that if UART mode is
selected and hardware flow control is disabled,
USART1 or timer 1 will have precedence to
use ports P0_4 and P0_5.
selects
when
the
assigning
order
of
several
In Table 40, the USART0 signals are shown as
follows:
UART:
•
•
•
•
RX : RXDATA
TX : TXDATA
RT : RTS
P2SEL.PRI3P1 and P2SEL.PRI0P1 select
the order of precedence when assigning
several peripherals to port 1. USART0 has
precedence when both are set to 0. Note that if
UART mode is selected and hardware flow
control is disabled, timer 1 or timer 3 will have
precedence to use ports P1_2 and P1_3.
CT : CTS
SPI:
•
•
•
•
MI : MISO
MO : MOSI
C : SCK
SS : SSN
13.4.6.5
USART1
The SFR register bit PERCFG.U1CFG selects
whether to use alternative 1 or alternative 2
locations.
P2DIR.PRIP0
precedence
peripherals to port 0. When set to 01, USART1
has precedence. Note that if UART mode is
selected and hardware flow control is disabled,
USART0 or timer 1 will have precedence to
use ports P0_2 and P0_3.
selects
when
the
assigning
order
of
several
In Table 40, the USART1 signals are shown
as follows:
UART:
•
•
•
•
RX : RXDATA
TX : TXDATA
RT : RTS
P2SEL.PRI3P1 and P2SEL.PRI2P1 select
the order of precedence when assigning
several peripherals to port 1. USART1 has
precedence when the former is set to 1 and
the latter is set to 0. Note that if UART mode is
selected and hardware flow control is disabled,
USART0 or timer 3 will have precedence to
use ports P2_4 and P2_5.
CT : CTS
SPI:
•
•
•
•
MI : MISO
MO : MOSI
C : SCK
SS : SSN
13.4.6.6
ADC
When using the ADC, Port 0 pins must be
configured as ADC inputs. Up to eight ADC
inputs can be used. To configure a Port 0 pin
to be used as an ADC input the corresponding
bit in the ADCCFG register must be set to 1.
The default values in this register select the
Port 0 pins as non-ADC input i.e. digital
input/outputs.
The ADC can be configured to use the
general-purpose I/O pin P2_0 as an external
trigger to start conversions. P2_0 must be
configured as a general-purpose I/O in input
mode, when being used for ADC external
trigger.
Refer to section 13.9 on page 126 for a
detailed description of use of the ADC.
The settings in the ADCCFG register override
the settings in P0SEL.
13.4.7
Debug interface
Ports P2_1 and P2_2 are used for debug data
and clock signals, respectively. These are
shown as DD (debug data) and DC (debug
clock) in Table 40. When the debug interface
is in use, P2DIR should select these pins as
inputs. The state of P2SELis overridden by the
debug interface. Also, the direction is
overridden when the chip changes the
direction to supply the external host with data.
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 81 of 211
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