SyncMOS Technologies International, Inc.
SM89T16R1
8-Bits Micro-controller
With 64KB Flash ROM & 1KB RAM & Two UART & RTC & ADC & PWM embedded
Instruction Set
The SM89T16R1 is High-Speed 80C51; it’s contained 4 clocks per machine. The SM89T16R1 dose one op-code
fetch per machine cycle .It consists of 111 instructions used 40 single-cycle, 38 used two-cycles,
19 used three-cycles, and 10 used four-cycles.
A summary of the instruction set is given in Table 4.
Addressing Mode
Notes on instruction set and address modes:
Rn
Register R7-R0 of the currently selected register bank.
Direct
8-bits internal data location’s address. This could be internal DATA RAM location (0-127) or a SFR[i.e., I/O port,
control register, status register, etc.(128-255) ]
@Ri
#data
#data16
addr11
8-bits RAM location addressed indirectly through register R1 or R0 of the actual register bank
8-bits constant included in the instruction
16-bits constant included in the instruction
11-bits destination address. Used by ACALL and AJMP. The branch can be anywhere within the same 2 Kbytes page
of program memory as the first byte of the following instruction.
Rel
Bit
Signed (2’s complement) 8-bits offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes
relative to first byte of the following instruction.
Direct addressed bit in internal data RAM or SFR
Table 4: summary of the instruction
Mnemonic
OPERATION
BYTE
CYCLE
Arithmetic Instructions
ADD
A,Rn
A = A + Rn
1
2
1
2
1
2
1
2
1
1
2
1
2
1
2
1
2
1
ADD
A,direct
A,@Ri
A,#data
A,Rn
A,direct
A,@Ri
A,#data
A,Rn
A = A + direct
ADD
A = A + <@Ri>
A = A + #data
ADD
ADDC
ADDC
ADDC
ADDC
SUBB
A = A + Rn + C
A = A + direct + C
A = A + @Ri + C
A = A + #data + C
A = A － Rn － C
SUBB
SUBB
SUBB
INC
INC
INC
INC
DEC
A,direct
A,@Ri
A,#data
A
Rn
direct
@Ri
A
2
1
2
1
1
2
1
1
2
1
2
1
1
2
1
1
A = A － direct － C
A = A － <@Ri> － C
A = A－#data － C
A = A + 1
Rn = Rn + 1
direct = direct + 1
<@Ri> = <@Ri> + 1
A = A － 1
DEC
DEC
DEC
INC
DEC
Rn
direct
@Ri
DPTR
DPTR
1
2
1
1
1
1
2
1
1
1
Rn = Rn － 1
direct = direct － 1
<@Ri> = <@Ri> － 1
DPTR = DPTR + 1
DPTR = DPTR － 1
MUL
DIV
DA
AB
AB
A
1
1
1
1
3
1
B:A = A × B
A = INT (A/B),B = MOD (A/B)
Decimal adjust ACC
Logical Instructions
ANL
ANL
ANL
ANL
ANL
ANL
ORL
ORL
ORL
ORL
ORL
ORL
A,Rn
A,direct
A,@Ri
A,#data
direct,A
direct,#data
A,Rn
A,direct
A,@Ri
A .AND. Rn
1
2
1
2
2
3
1
2
1
2
2
3
1
2
1
2
2
3
1
2
1
2
2
3
A .AND. direct
A .AND. <@Ri>
A .AND. #data
direct .AND. A
direct .AND. #data
A .OR. Rn
A .OR. direct
A .OR. <@Ri>
A .OR. #data
A,#data
direct,A
direct,#data
direct .OR. A
direct .OR. #data
Specifications subject to change without notice contact your sales representatives for the most recent information.
Ver 2.1 SM89T16R1 08/2006
17
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
