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SM59R05A5L25 参数 Datasheet PDF下载

SM59R05A5L25图片预览
型号: SM59R05A5L25
PDF下载: 下载PDF文件 查看货源
内容描述: SM59R16A5 / SM59R09A5 / SM59R05A5\n8位微控制器\n64KB / 36KB / 20KB具有ISP功能的Flash\n和2KB RAM的嵌入式 [SM59R16A5/SM59R09A5/SM59R05A5 8-Bit Micro-controller 64KB/36KB/20KB with ISP Flash & 2KB RAM embedded]
分类和应用: 微控制器
文件页数/大小: 89 页 / 3025 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
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SM59R16A5/SM59R09A5/SM59R05A5  
8-Bit Micro-controller  
64KB/36KB/20KB with ISP Flash  
& 2KB RAM embedded  
14. IIC function  
The IIC module uses the SCL (clock) and the SDA (data) line to communicate with external IIC interface. Its speed can be  
selected to 400Kbps (maximum) by software setting the IICBR [2:0] control bit. The IIC module provided 2 interrupts  
(RXIF, TXIF). It will generate START, repeated START and STOP signals automatically in master mode and can detects  
START, repeated START and STOP signals in slave mode. The maximum communication length and the number of  
devices that can be connected are limited by a maximum bus capacitance of 400pF.  
The interrupt vector is 6Bh.  
Mnemonic  
Description  
Direct  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
RESET  
IIC function  
P4UR  
1
P2PW  
M
AUX  
Auxiliary register  
91h  
BRGS  
-
P4SPI  
P4IIC  
P0KBI  
DPS  
00H  
IIC control  
register  
IIC status register  
IIC Address 1  
register  
IIC Address 2  
register  
IIC Read/Write  
register  
IICCTL  
IICS  
F9h  
F8h  
FAh  
IICEN  
MSS  
MAS  
RDR  
RStart  
TDR  
IICBR[2:0]  
TXAK  
04H  
00H  
A0H  
MStart  
RXIF  
TXIF  
RXAK  
RW  
MATCH1  
or RW1  
MATCH2  
or RW2  
IICA1  
IICA1[7:1]  
IICA2  
IICRWD  
IICS2  
FBh  
FCh  
FDh  
IICA2[7:1]  
60H  
00H  
00H  
IICRWD[7:0]  
IIC status2  
register  
BF_E  
N
-
-
-
-
AB_EN  
AB_F  
BF  
Mnemonic: AUX  
Address: 91h  
7
6
-
5
4
3
2
1
0
DPS  
Reset  
00H  
BRGS  
P4SPI  
P4UR1  
P4IIC  
P0KBI  
P2PWM  
P4IIC: P4IIC = 0 – IIC function on P1.  
P4IIC = 1 – IIC function on P4.  
Mnemonic: IICCTL  
Address: F9h  
7
6
5
4
3
2
1
0
Reset  
IICEN  
MSS  
MAS  
RStart  
IICBR[2:0]  
04h  
IICEN: Enable IIC module  
IICEN = 1 is Enable  
IICEN = 0 is Disable.  
MSS: Master or slave mode select.  
MSS = 1 is master mode.  
MSS = 0 is slave mode.  
*The software must set this bit before setting others register.  
MAS: Master address select (master mode only)  
MAS = 0 is to use IICA1.  
MAS = 1 is to use IICA2.  
RStart: Re-start control bit (master mode only)  
When this bit is set, the module will generate a start condition to the SDA and SCL lines (after  
current ACK) and send out the calling address which is stored in the IICA1 or IICA2( selected by  
MAS control bit).When module is finished to send out address, this bit will be cleared by  
hardware.  
IICBR[2:0]: Baud rate selection (master mode only), where Fosc is the external crystal or oscillator  
frequency. The default is Fosc/512 for users’ convenience.  
IICBR[2:0]  
000  
Baud rate  
Fosc/32  
Specifications subject to change without notice contact your sales representatives for the most recent information.  
ISSFD-M047 60 Ver.G SM59R16A5 01/2014