SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
Mnemonic: PWMD3H
Address: B3h
7
6
-
5
-
4
-
3
-
2
-
1
0
Reset
00H
PWMP3
PWMD3[9:8]
Mnemonic: PWMD3L
Address: B4h
7
6
5
4
3
2
1
0
Reset
00H
PWMD3[7:0]
PWMP3: PWM channel 3 idle polarity select.
“0” – PWM channel 3 will idle low.
“1” – PWM channel 3 will idle high.
PWMD3[9:0]: PWM channel 3 data register.
Mnemonic: PWMMDH
Address: CEh
7
-
6
-
5
-
4
-
3
-
2
-
1
0
Reset
00H
PWMMD[9:8]
Mnemonic: PWMMDL
Address: CFh
7
6
5
4
3
2
1
0
Reset
PWMMD[7:0]
FFH
PWMMD[9:0]: PWM Max Data register.
PWM count from 0000h to PWMMD[9:0]. When PWM count data equal PWMMD[9:0]
is overflow.
PWMPx = 0 & PWMDx = 00h
PWMx
Low
High
PWMPx = 0 & PWMDx ≠ 00h
PWMx
PWMPx = 1 & PWMDx = 00h
PWMx
PWMPx = 1 & PWMDx ≠ 00h
PWMx
PWMMD +1
PWM clock
PWM period =
PWMDx
Leader pulse =
PWM clock
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047 59 Ver.G SM59R16A5 01/2014
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
