SML2108
PRELIMINARY
Start and Stop Conditions
3
9
1
2
8
SCL
BothDataandClocklinesremainhighwhenthebusisnot
busy. Datatransferbetweendevicesmaybeinitiatedwith
aStartconditiononlywhenSCLandSDAarehigh. Ahigh-
to-lowtransitionoftheDatalinewhiletheClocklineishigh
is defined as a Start condition. A low-to-high transition of
theDatalinewhiletheClocklineishighisdefinedasaStop
condition. See Figure 9.
SDA
Trans
SDA
Rec
ACK
2053 Fig10
Figure 10. Acknowledge Timing
In the case of a Read from a Summit part, when the last
byte has been transferred to the Master, the Master will
leave the Data line high for a NACK. This will cause the
Summitparttostopsendingdata,andtheMasterwillissue
a Stop on the clock pulse following the NACK.
START
Condition
STOP
Condition
SCL
SDA In
InthecaseofaWritetoaSummitparttheMasterwillsend
aStopontheclockpulseafterthelastAcknowledge. This
will indicate to the Summit part that it should begin its
internal non-volatile write cycle.
2053 Fig09
Figure 9. I2C Start and Stop Timing
Read and Write
Protocol
The first byte from a Master is always made up of a seven
bitSlaveaddressandtheRead/Writebit. TheR/Wbittells
theSlavewhethertheMasterisreadingDatafromthebus
orwritingDatatothebus(1=read,0=write). Thefirstfour
of the seven address bits are called the Device Type
Identifier (DTI). The DTI for the SML2108 is 1010. The
next three bits are not used in the SML2108 (See Figure
11). The SML2108 will issue an Acknowledge after
recognizing a Start condition and its DTI.
The protocol defines any device that sends data onto the
busasaTransmitter,andanydevicethatreceivesdataas
a Receiver. The device controlling data transmission is
called the Master, and the controlled device is called the
Slave. In all cases the Summit Microelectronic devices
are slave devices, since they never initiate any data
transfers.
Acknowledge
Inthereadmodethe SML2108transmitseightbitsofdata,
then releases the SDA line, and monitors the line for an
Acknowledge signal. If an Acknowledge is detected, and
no Stop condition is generated by the Master, the
SML2108 will continue to transmit data. If an Acknowl-
edge is not detected (NACK) the SML2108 will terminate
further data transmission. See Figure 12.
Data is always transferred in 8-Bit bytes. Acknowledge
(ACK) is used to indicate a successful data transfer. The
Transmitting device will release the bus after transmitting
eight bits. During the ninth clock cycle the Receiver will
pull the SDA line low to Acknowledge that it received the
eight bits of data (See Figure 10). The termination of a
Master Read sequence is indicated by a non-Acknowl-
edge (NACK), where the Master will leave the Data line
high.
SCL
SDA
3
1
5
x
8
9
1
1
2
0
4
0
6
x
7
x
R/W
ACK
2053 Fig11
Figure 11. Typical Master Address Byte Transmission
SUMMIT MICROELECTRONICS, Inc.
2053 2.2 11/07/00
14
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
