SML2108
PRELIMINARY
S
T
A
R
T
S
T
O
P
Device
Address
R/
W
Master
SDA
Location Address
0 0 0 0 0
D D
D D D D D D D D
7 6 5 4 3 2 1 0
x
x x x
x x
x
0 0 1
x
x
0
0
0
0
1
9
8
A
C
K
A
C
K
A
C
K
A
C
K
Slave
2053 Fig21
Figure 21. 10-Bit DAC Volatile Register Write
S
T
O
P
Device
Address
R/
W
Master
SDA
Location Address
0 0 0 1 0
D D
D D D D D D D D
7 6 5 4 3 2 1 0
x
x x x
x x
x
x
x
0
0
0
0
1
0 0 1
9
8
A
C
K
A
C
K
A
C
K
A
C
K
Slave
2053 Fig22
Figure 22. 10-Bit DAC Nonvolatile Register Write
S
T
A
R
S
S
T
O
P
N
A
C
K
T
A
C
K
A
R
T
Device
Address
Device
Address
R/
W
R/
W
Master
T
Location Address
D D
D D D D D D D D
7 6 5 4 3 2 1 0
x
x x x
x x
x
x
x
x
1 0 0 1
x
x
0
0
0
0
0
0
0
0
0
1
1
0
0
1
9
8
SDA
A
C
K
A
C
K
A
C
K
2053 Fig23
Slave
Figure 23. 10-Bit DAC Volatile Register Read with Dummy Write
S
T
A
R
T
S
T
S
T
O
P
N
A
C
K
A
A
C
Device
Address
Device
Address
R/
W
R/
W
R
T
Master
SDA
K
Location Address
D D
D D D D D D D D
7 6 5 4 3 2 1 0
x
x x x
x x
9
x
x
x
x
1 0 0 1
x
x
0
0
0
0
0
0
0
1
0
1
1
0
0
1
8
A
C
K
A
C
K
A
C
K
2053 Fig24
Slave
Figure 24. 10-Bit DAC Nonvolatile Register Read with Dummy Write
SUMMIT MICROELECTRONICS, Inc.
2053 2.2 11/07/00
18
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
