Memory and register map
Table 9. General hardware register map (continued)
Address
STM8S207xx, STM8S208xx
Reset
Block
Register label
Register name
status
00 5200h
00 5201h
00 5202h
00 5203h
00 5204h
00 5205h
00 5206h
00 5207h
SPI_CR1
SPI_CR2
SPI control register 1
SPI control register 2
SPI interrupt control register
SPI status register
0x00
0x00
0x00
0x02
0x00
0x07
0xFF
0xFF
SPI_ICR
SPI_SR
SPI
SPI_DR
SPI data register
SPI_CRCPR
SPI_RXCRCR
SPI_TXCRCR
SPI CRC polynomial register
SPI Rx CRC register
SPI Tx CRC register
00 5208h to
00 520Fh
Reserved area (8 bytes)
00 5210h
00 5211h
00 5212h
00 5213h
00 5214h
00 5215h
00 5216h
00 5217h
00 5218h
00 5219h
00 521Ah
00 521Bh
00 521Ch
00 521Dh
00 521Eh
I2C_CR1
I2C_CR2
I2C control register 1
I2C control register 2
0x00
0x00
0x00
0x00
0x00
I2C_FREQR
I2C_OARL
I2C_OARH
I2C frequency register
I2C own address register low
I2C own address register high
Reserved
I2C_DR
I2C_SR1
I2C data register
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x02
0x00
I2C
I2C status register 1
I2C_SR2
I2C status register 2
I2C_SR3
I2C status register 3
I2C_ITR
I2C interrupt control register
I2C clock control register low
I2C clock control register high
I2C TRISE register
I2C_CCRL
I2C_CCRH
I2C_TRISER
I2C_PECR
I2C packet error checking register
00 521Fh to
00 522Fh
Reserved area (17 bytes)
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Doc ID 14733 Rev 9