Memory and register map
STM8S903K3 STM8S903F3
Address
Block
Register label
ADC_HTRL
Register name
Reset
status
ADC high threshold register low
ADC low threshold register high
ADC low threshold register low
0xFF
0x00
0x00
0x00 5409
0x00 540A
0x00 540B
0x00 540C
0x00 540D
0x00 540E
0x00 540F
ADC_LTRH
ADC_LTRL
ADC_AWSRH
ADC_AWSRL
ADC _AWCRH
ADC_AWCRL
ADC analog watchdog status register high 0x00
ADC analog watchdog status register low 0x00
ADC analog watchdog control register high 0x00
ADC analog watchdog control register low 0x00
Reserved area (1008 bytes)
0x00 5410 to
0x00 57FF
(1)Depends on the previous reset source.
(2) Write only register.
6.2.3
CPU/SWIM/debug module/interrupt controller registers
Table 9: CPU/SWIM/debug module/interrupt controller registers
Address
Block
Register label
Register name
Reset status
0x00 7F00
A
Accumulator
0x00
0x00 7F01
0x00 7F02
0x00 7F03
0x00 7F04
0x00 7F05
0x00 7F06
0x00 7F07
0x00 7F08
PCE
PCH
PCL
XH
Program counter extended
Program counter high
Program counter low
X index register high
X index register low
Y index register high
Y index register low
Stack pointer high
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x03
CPU(1)
XL
YH
YL
SPH
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DocID15590 Rev 8