STM8S903K3 STM8S903F3
Memory and register map
Address
Block
Register label
TIM6_IER
Register name
Reset
status
TIM6 interrupt enable register
TIM6 status register
0x00
0x00
0x00
0x00
0x00
0xFF
0x00 5343
0x00 5344
0x00 5345
0x00 5346
0x00 5347
0x00 5348
TIM6_SR
TIM6_EGR
TIM6_CNTR
TIM6_PSCR
TIM6_ARR
TIM6 event generation register
TIM6 counter
TIM6 prescaler register
TIM6 auto-reload register
Reserved area (153 bytes)
0x00 5349 to
0x00 53DF
ADC1
ADC _DBxR
ADC data buffer registers
0x00
0x00 53E0 to
0x00 53F3
Reserved area (12 bytes)
0x00 53F4 to
0x00 53FF
ADC1
cont’d
ADC _CSR
ADC_CR1
ADC_CR2
ADC_CR3
ADC_DRH
ADC_DRL
ADC_TDRH
ADC_TDRL
ADC_HTRH
ADC control/status register
ADC configuration register 1
ADC configuration register 2
ADC configuration register 3
ADC data register high
0x00
0x00
0x00
0x00
0xXX
0xXX
0x00 5400
0x00 5401
0x00 5402
0x00 5403
0x00 5404
0x00 5405
0x00 5406
0x00 5407
0x00 5408
ADC data register low
ADC Schmitt trigger disable register high 0x00
ADC Schmitt trigger disable register low
ADC high threshold register high
0x00
0x03
DocID15590 Rev 8
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STMICROELECTRONICS [ ST ]
