Memory and register map
STM8S903K3 STM8S903F3
Address
Block
Register label
TIM5_CCMR2
TIM5_CCMR3
TIM5_CCER1
TIM5_CCER2
TIM5_CNTRH
TIM5_CNTRL
TIM5_PSCR
TIM5_ARRH
TIM5_ARRL
Register name
Reset
status
TIM5 capture/compare mode register 2
TIM5 capture/compare mode register 3
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00 5308
0x00 5309
0x00 530A
0x00 530B
00 530C0x
0x00 530D
0x00 530E
0x00 530F
0x00 5310
0x00 5311
0x00 5312
0x00 5313
0x00 5314
0x00 5315
0x00 5316
TIM5 capture/compare enable register 1
TIM5 capture/compare enable register 2
TIM5 counter high
TIM5 counter low
TIM5 prescaler register
TIM5 auto-reload register high
TIM5 auto-reload register low
TIM5_CCR1H
TIM5_CCR1L
TIM5_CCR2H
TIM5_CCR2L
TIM5_CCR3H
TIM5_CCR3L
TIM5 capture/compare register 1 high
TIM5 capture/compare register 1 low
TIM5 capture/compare register 2 high
TIM5 capture/compare register 2 low
TIM5 capture/compare register 3 high
TIM5 capture/compare register 3 low
Reserved area (43 bytes)
0x00 5317 to
0x00 533F
TIM6
TIM6_CR1
TIM6_CR2
TIM6_SMCR
TIM6 control register 1
0x00
0x00
0x00
0x00 5340
0x00 5341
0x00 5342
TIM6 control register 2
TIM6 slave mode control register
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DocID15590 Rev 8
STMICROELECTRONICS [ ST ]
