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STM8S003F3P6C 参数 Datasheet PDF下载

STM8S003F3P6C图片预览
型号: STM8S003F3P6C
PDF下载: 下载PDF文件 查看货源
内容描述: [MICROCONTROLLER]
分类和应用: 时钟外围集成电路
文件页数/大小: 103 页 / 1343 K
品牌: STMICROELECTRONICS [ ST ]
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Electrical characteristics  
STM8S003F3 STM8S003K3  
Figure 35. Typical NRST pull-up resistance vs V @ 4 temperatures  
DD  
Figure 36. Typical NRST pull-up current vs V @ 4 temperatures  
DD  
The reset network shown in Figure 37 protects the device against parasitic resets. The user  
must ensure that the level on the NRST pin can go below the V max. level specified in  
IL  
Table 38. Otherwise the reset is not taken into account internally. For power consumption  
sensitive applications, the capacity of the external reset capacitor can be reduced to limit  
charge/discharge current. If the NRST signal is used to reset the external circuitry, care  
must be taken of the charge/discharge time of the external capacitor to fulfill the external  
device’s reset timing conditions. The minimum recommended capacity is 10 nF.  
76/103  
DocID018576 Rev 5  
 
 
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