STM8S003F3 STM8S003K3
Memory and register map
Table 7 lists the boundary addresses for each memory size. The top of the stack is at the
RAM end address in each case.
Table 7. Flash, Data EEPROM and RAM boundary addresses
Memory area
Flash program memory
RAM
Size (bytes)
Start address
0x00 8000
End address
0x00 9FFF
0x00 03FF
8 K
1 K
0x00 0000
Data EEPROM
128
0x00 4000
0x00 407F
6.2
Register map
Table 8. I/O port hardware register map
Reset
status
Address
Block
Register label
Register name
0x00 5000
0x00 5001
0x00 5002
0x00 5003
0x00 5004
0x00 5005
0x00 5006
0x00 5007
0x00 5008
0x00 5009
0x00 500A
0x00 500B
0x00 500C
0x00 500D
0x00 500E
0x00 500F
0x00 5010
0x00 5011
0x00 5012
0x00 5013
PA_ODR
PA_IDR
Port A data output latch register
Port A input pin value register
Port A data direction register
Port A control register 1
0x00
0xXX(1)
0x00
Port A
PA_DDR
PA_CR1
PA_CR2
PB_ODR
PB_IDR
PB_DDR
PB_CR1
PB_CR2
PC_ODR
PB_IDR
PC_DDR
PC_CR1
PC_CR2
PD_ODR
PD_IDR
PD_DDR
PD_CR1
PD_CR2
0x00
Port A control register 2
0x00
Port B data output latch register
Port B input pin value register
Port B data direction register
Port B control register 1
0x00
0xXX(1)
Port B
Port C
Port D
0x00
0x00
Port B control register 2
0x00
Port C data output latch register
Port C input pin value register
Port C data direction register
Port C control register 1
0x00
0xXX(1)
0x00
0x00
Port C control register 2
0x00
Port D data output latch register
Port D input pin value register
Port D data direction register
Port D control register 1
0x00
0xXX(1)
0x00
0x02
Port D control register 2
0x00
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