STM32F103xC, STM32F103xD, STM32F103xE
Electrical characteristics
Figure 41. NAND controller waveforms for common memory write access
FSMC_NCEx
Low
ALE (FSMC_A17)
CLE (FSMC_A16)
t
d(ALE-NOE)
FSMC_NWE
t
w(NWE)
t
h(NOE-ALE)
FSMC_NOE
t
d(D-NWE)
t
v(NWE-D)
FSMC_D[15:0]
t
h(NWE-D)
ai14913b
Table 40.
Symbol
t
d(D-NWE)(2)
t
w(NOE)(2)
t
su(D-NOE)(2)
t
h(NOE-D)(2)
t
w(NWE)(2)
t
v(NWE-D)(2)
t
h(NWE-D)(2)
Switching characteristics for NAND Flash read and write cycles
(1)
Parameter
FSMC_D[15:0] valid before FSMC_NWE high
FSMC_NOE low width
FSMC_D[15:0] valid data before FSMC_NOE
high
Min
6T
HCLK
+ 12
4T
HCLK
– 1.5 4T
HCLK
+ 1.5
25
Max
Unit
ns
ns
ns
ns
4T
HCLK
+ 2.5
0
10T
HCLK
+ 4
3T
HCLK
+ 1.5
3T
HCLK
+ 4.5
3T
HCLK
+ 2
3T
HCLK
+ 4.5
ns
ns
ns
ns
ns
ns
ns
FSMC_D[15:0] valid data after FSMC_NOE high 7
FSMC_NWE low width
FSMC_NWE low to FSMC_D[15:0] valid
FSMC_NWE high to FSMC_D[15:0] invalid
4T
HCLK
– 1
t
d(ALE-NWE)(3)
FSMC_ALE valid before FSMC_NWE low
t
h(NWE-ALE)(3)
FSMC_NWE high to FSMC_ALE invalid
t
d(ALE-NOE)(3)
FSMC_ALE valid before FSMC_NOE low
t
h(NOE-ALE)(3)
FSMC_NWE high to FSMC_ALE invalid
1. C
L
= 15 pF.
2. Based on characterization, not tested in production.
3. Guaranteed by design, not tested in production.
Doc ID 14611 Rev 7
79/123
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