STM32F103xC, STM32F103xD, STM32F103xE
Electrical characteristics
Figure 25. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms
t
w(NE)
FSMC_NEx
FSMC_NOE
t
v(NWE_NE)
t
w(NWE)
t
h(NE_NWE)
FSMC_NWE
t
v(A_NE)
FSMC_A[25:0]
Address
t
h(A_NWE)
t
v(BL_NE)
FSMC_NBL[1:0]
t
v(Data_NE)
NBL
t
h(BL_NWE)
t
h(Data_NWE)
Data
FSMC_D[15:0]
t
v(NADV_NE)
t
w(NADV)
FSMC_NADV
(1)
ai14990
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
Table 32.
Symbol
t
w(NE)
t
v(NWE_NE)
t
w(NWE)
t
h(NE_NWE)
t
v(A_NE)
t
h(A_NWE)
t
v(BL_NE)
t
h(BL_NWE)
t
v(Data_NE)
t
h(Data_NWE)
t
v(NADV_NE)
t
w(NADV)
1. C
L
= 15 pF.
Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
(1)(2)
Parameter
FSMC_NE low time
FSMC_NEx low to FSMC_NWE low
FSMC_NWE low time
FSMC_NWE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
Address hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NWE high
FSMC_NEx low to Data valid
Data hold time after FSMC_NWE high
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
T
HCLK
5.5
T
HCLK
+ 1.5
T
HCLK
– 0.5
T
HCLK
+ 7
T
HCLK
1.5
Min
3T
HCLK
– 1
T
HCLK
– 0.5
T
HCLK
– 0.5
T
HCLK
7.5
Max
3T
HCLK
+ 2
T
HCLK
+ 1.5
T
HCLK
+ 1.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2. Based on characterization, not tested in production.
Doc ID 14611 Rev 7
63/123
STMICROELECTRONICS [ STMICROELECTRONICS ]
