Register description
STA335BW
Dynamic range compression mode
Table 27. Limiter attack threshold as a
function of LxAT bits
Table 28. Limiter release threshold as a
as a function of LxRT bits
(DRC-Mode).
(DRC-Mode).
DRC(db relative to Volume +
LxAT(3..0)
DRC(dB relative to Volume)
LxRT(3..0)
LxAT)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
-31
-29
-27
-25
-23
-21
-19
-17
-16
-15
-14
-13
-12
-10
-7
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
-∞
-38 dB
-36 dB
-33 dB
-31 dB
-30 dB
-28 dB
-26 dB
-24 dB
-22 dB
-20 dB
-18 dB
-15 dB
-12 dB
-9 dB
-4
-6 dB
5.12
User-defined coefficient control registers (addresses 0x16 to
0x26)
5.12.1
Coefficient address register
D7
D6
D5
D4
D3
D2
D1
D0
CFA5
0
CFA4
0
CFA3
0
CFA2
0
CFA1
0
CFA0
0
5.12.2
Coefficient b1 data register bits 23..16
D7
D6
D5
D4
D3
D2
D1
D0
C1B23
0
C1B22
0
C1B21
0
C1B20
0
C1B19
0
C1B18
0
C1B17
0
C1B16
0
42/54
STMICROELECTRONICS [ ST ]
