Register description
STA335BW
2
10. Read middle 8-bits of coefficient a1 in I C address 0x1E.
2
11. Read bottom 8-bits of coefficient a1 in I C address 0x1F.
2
12. Read top 8-bits of coefficient a2 in I C address 0x20.
2
13. Read middle 8-bits of coefficient a2 in I C address 0x21.
2
14. Read bottom 8-bits of coefficient a2 in I C address 0x22.
2
15. Read top 8-bits of coefficient b0 in I C address 0x23.
2
16. Read middle 8-bits of coefficient b0 in I C address 0x24.
2
17. Read bottom 8-bits of coefficient b0 in I C address 0x25.
Writing a single coefficient to RAM
2
1. Write 6-bits of address to I C register 0x16.
2
2. Write top 8-bits of coefficient in I C address 0x17.
2
3. Write middle 8-bits of coefficient in I C address 0x18.
2
4. Write bottom 8-bits of coefficient in I C address 0x19.
2
5. Write 1 to W1 bit in I C address 0x26.
Writing a set of coefficients to RAM
2
1. Write 6-bits of starting address to I C register 0x16.
2
2. Write top 8-bits of coefficient b1 in I C address 0x17.
2
3. Write middle 8-bits of coefficient b1 in I C address 0x18.
2
4. Write bottom 8-bits of coefficient b1 in I C address 0x19.
2
5. Write top 8-bits of coefficient b2 in I C address 0x1A.
2
6. Write middle 8-bits of coefficient b2 in I C address 0x1B.
2
7. Write bottom 8-bits of coefficient b2 in I C address 0x1C.
2
8. Write top 8-bits of coefficient a1 in I C address 0x1D.
2
9. Write middle 8-bits of coefficient a1 in I C address 0x1E.
2
10. Write bottom 8-bits of coefficient a1 in I C address 0x1F.
2
11. Write top 8-bits of coefficient a2 in I C address 0x20.
2
12. Write middle 8-bits of coefficient a2 in I C address 0x21.
2
13. Write bottom 8-bits of coefficient a2 in I C address 0x22.
2
14. Write top 8-bits of coefficient b0 in I C address 0x23.
2
15. Write middle 8-bits of coefficient b0 in I C address 0x24.
2
16. Write bottom 8-bits of coefficient b0 in I C address 0x25.
2
17. Write 1 to WA bit in I C address 0x26.
The mechanism for writing a set of coefficients to RAM provides a method of updating the
five coefficients corresponding to a given biquad (filter) simultaneously to avoid possible
unpleasant acoustic side-effects. When using this technique, the 6-bit address specifies the
address of the biquad b1 coefficient (for example, 0, 5, 10, 20, 35 decimal), and the
STA335BW generates the RAM addresses as offsets from this base value to write the
complete set of coefficient data.
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STMICROELECTRONICS [ ST ]
