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ST92F150JDV1Q6 参数 Datasheet PDF下载

ST92F150JDV1Q6图片预览
型号: ST92F150JDV1Q6
PDF下载: 下载PDF文件 查看货源
内容描述: 8月16日- BIT单电压闪存单片机系列内存, E3 TMEMULATED EEPROM , CAN 2.0B和J1850 BLPD [8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 426 页 / 3830 K
品牌: STMICROELECTRONICS [ ST ]
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CONTROLLER AREA NETWORK (bxCAN)  
CONTROLLER AREA NETWORK (Cont’d)  
Figure 144. bxCAN Operating Modes  
RESET  
SLEEP  
SLAK= 1  
INAK = 0  
SYNC  
SLAK= X  
INAK = X  
NORMAL  
INITIALIZATION  
SLAK= 0  
INAK = 1  
SLAK= 0  
INAK = 0  
INRQ  
10.10.4 Operating Modes  
tus of the CAN bus output CANTX is recessive  
(high).  
bxCAN has three main operating modes: initiali-  
zation, normal and sleep. After a hardware reset,  
bxCAN is in sleep mode to reduce power con-  
sumption and an internal pull-up is active on RX1.  
The software requests bxCAN to enter initializa-  
tion or sleep mode by setting the INRQ or SLEEP  
bits in the CMCR register. Once the mode has  
been entered, bxCAN confirms it by setting the  
INAK or SLAK bits in the CMSR register and the  
internal pull-up is disabled. When neither INAK nor  
SLAK are set, bxCAN is in normal mode. Before  
entering normal mode bxCAN always has to syn-  
chronize on the CAN bus. To synchronize, bx-  
CAN waits until the CAN bus is idle, this means 11  
consecutive recessive bits have been monitored  
on CANRX.  
Entering Initialization Mode does not change any  
of the configuration registers.  
To initialize the CAN Controller, software has to  
set up the Bit Timing registers and the filters. If a  
filter bank is not used, it is recommended to leave  
it non active (leave the corresponding FACT bit  
cleared).  
10.10.4.2 Normal Mode  
Once the initialization has been done, the software  
must request the hardware to enter Normal mode,  
to synchronize on the CAN bus and start reception  
and transmission. Entering Normal mode is done  
by clearing the INRQ bit in the CMCR register and  
waiting until the hardware has confirmed the re-  
quest by clearing the INAK bit in the CMSR regis-  
ter. Afterwards, the bxCAN synchronizes with the  
data transfer on the CAN bus by waiting for the oc-  
currence of a sequence of 11 consecutive reces-  
sive bits (Bus Idle) before it can take part in bus  
activities and start message transfer.  
10.10.4.1 Initialization Mode  
The software initialization can be done while the  
hardware is in Initialization mode. To enter this  
mode the software sets the INRQ bit in the CMCR  
register and waits until the hardware has con-  
firmed the request by setting the INAK bit in the  
CMSR register.  
The initialization of the filter values is independent  
from Initialization Mode but must be done while the  
filter is not active (corresponding FACTx bit  
cleared). The filter scale and mode configuration  
must be configured before entering Normal Mode.  
To leave Initialization mode, the software clears  
the INQR bit. bxCAN has left Initialization mode  
once the INAK bit has been cleared by hardware.  
While in Initialization Mode, all message transfers  
to and from the CAN bus are stopped and the sta-  
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