CONTROLLER AREA NETWORK (bxCAN)
CONTROLLER AREA NETWORK (Cont’d)
10.10.4.3 Low Power Mode (Sleep)
without affecting it by the transmission of dominant
bits (Acknowledge Bits, Error Frames).
To reduce power consumption, bxCAN has a low
power mode called sleep mode. This mode is en-
tered on software request by setting the SLEEP bit
in the CMCR register. In this mode, the bxCAN
clock is stopped. Consequently, software can still
access the bxCAN registers and mailboxes but the
bxCAN will not update the status bits.
Figure 145. bxCAN in Silent Mode
bxCAN
Tx
Rx
Example: If software requests entry to initializa-
tion mode by setting the INRQ bit while bxCAN is
in sleep mode, it will not be acknowledged by the
hardware, INAK stays cleared.
=1
bxCAN can be woken up (exit sleep mode) either
by software clearing the SLEEP bit or on detection
of CAN bus activity.
CANTX CANRX
10.10.4.6 Loop Back Mode
On CAN bus activity detection, hardware automat-
ically performs the wake-up sequence by clearing
the SLEEP bit if the AWUM bit in the CMCR regis-
ter is set. If the AWUM bit is cleared, software has
to clear the SLEEP bit when a wake-up interrupt
occurs, in order to exit from sleep mode.
The bxCAN can be set in Loop Back Mode by set-
ting the LBKM bit in the CDGR register. In Loop
Back Mode, the bxCAN treats its own transmitted
messages as received messages and stores them
(if they pass acceptance filtering) in a Receive
mailbox. bxCAN in Loop Back Mode
Note: If the wake-up interrupt is enabled (WKUIE
bit set in CIER register) a wake-up interrupt will be
generated on detection of CAN bus activity, even if
the bxCAN automatically performs the wake-up
sequence.
bxCAN
After the SLEEP bit has been cleared, sleep mode
is exited once bxCAN has synchronized with the
CAN bus, refer to Figure 144.bxCAN Operating
Modes. The sleep mode is exited once the SLAK
bit has been cleared by hardware.
Tx
Rx
10.10.4.4 Test Mode
Test mode can be selected by the SILM and LBKM
bits in the CDGR register. These bits must be con-
figured while bxCAN is in Initialization mode. Once
test mode has been selected, the INRQ bit in the
CMCR register must be reset to enter Normal
mode.
CANTX CANRX
10.10.4.5 Silent Mode
This mode is provided for self-test functions. To be
independent of external events, the CAN Core ig-
nores acknowledge errors (no dominant bit sam-
pled in the acknowledge slot of a data / remote
frame) in Loop Back Mode. In this mode, the bx-
CAN performs an internal feedback from its Tx
output to its Rx input. The actual value of the CAN-
RX input pin is disregarded by the bxCAN. The
transmitted messages can be monitored on the
CANTX pin.
The bxCAN can be put in Silent mode by setting
the SILM bit in the CDGR register.
In Silent mode, the bxCAN is able to receive valid
data frames and valid remote frames, but it sends
only recessive bits on the CAN bus and it cannot
start a transmission. If the bxCAN has to send a
dominant bit (ACK bit, overload flag, active error
flag), the bit is rerouted internally so that the CAN
Core monitors this dominant bit, although the CAN
bus may remain in recessive state. Silent mode
can be used to analyze the traffic on a CAN bus
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STMICROELECTRONICS [ ST ]
