ST7538
Figure 5. Data Reception ➨ Control Register read ➨ Data Reception Timing Diagram
T
CC
T
CC
CLR_T
RXD
T
DS
T
DH
T
DS
T
T
B
DH
BIT23
BIT22
T
CR
T
CR
REG_DATA
RxTx
D03IN1404
Figure 6. Data Reception ➨ Control Register write ➨ Data Reception Timing Diagram
T
T
CC
CC
CLR_T
RXD
T
T
T
B
DS
DH
T
T
CR
CR
REG_DATA
RxTx
T
T
CR
CR
T
T
H
S
TXD
BIT23
BIT22
D03IN1403
Figure 7. Data Transmission ➨ Control Register read ➨ Data Reception Timing Diagram
T
T
CC
CC
CLR_T
T
T
T
T
T
DH
B
DS
DH
DS
RXD
BIT23
BIT22
T
T
T
CR
CR
REG_DATA
RxTx
CR
T
T
H
S
TXD
D03IN1405
Figure 8. Data Transmission ➨ Control Register Write ➨ Data Reception Timing Diagram
T
T
CC
CC
CLR_T
TXD
T
T
T
H
B
S
BIT23
BIT22
T
T
T
S
H
CR
REG_DATA
T
CR
T
CR
RxTx
RXD
T
T
DH
DS
D03IN1401
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