5 System configuration
ST40RA
5.1.1 System address map
a
Address
Module
Reference
Base
Top
Standard bus interfaces
EMI (FMI)
ST40 System Architecture Manual Volume 2: Bus
Interfaces
0x0000 0000
0x07F0 0000
0x07EF FFFF
0x07FF FFFF
EMI control and buffer
registers
LMI
0x0800 0000
0x0F00 0000
0x1000 0000
0x1700 0000
0x1800 0000
0x0EFF FFFF
0x0FFF FFFF
0x16FF FFFF
0x17FF FFFF
0x1AFF FFFF
LMI control registers
PCI
PCI control registers
Reserved
ST40 core peripherals
DMAC
ST40 System Architecture Manual Volume 1: System
0x1B00 0000
0x1B01 0000
0x1B02 0000
0x1B03 0000
0x1B04 0000
0x1B05 0000
0x1B06 0000
0x1B10 0000
0x1B11 0000
0x1B00 FFFF
0x1B01 FFFF
0x1B02 FFFF
0x1B03 FFFF
0x1B04 FFFF
0x1B05 FFFF
0x1B0F FFFF
0x1B10 FFFF
0x1B12 FFFF
PIO1
PIO2
PIO3
CLOCKGEN
Interconnect
Reserved
CLOCKGENB
Reserved
EMPI
0x1B13 0000
0x1B13 8000
0x1B13 7FFF
0x1B13 FFFF
ST40 System Architecture Manual Volume 2: Bus
Interfaces
MPXARB
ST40 System Architecture Manual Volume 2: Bus
Interfaces
ST40RA additional peripherals
ST40 System Architecture Manual Volume 4: I/O
Devices
MailBox
0x1B15 0000
0x1B15 FFFF
0x1B19 FFFF
0x1B1F FFFF
SYSCONF
Reserved
0x1B19 0000
0x1B1A 0000
Reserved for additional peripherals
Reserved
0x1B20 0000
0x1B3F FFFF
0x1E0F FFFF
ST40 core peripherals
INTC2
ST40 System Architecture Manual Volume 1: System
0x1E08 0000
Table 2: ST40RA system address map
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STMicroelectronics
ADCS 7260755H
STMICROELECTRONICS [ ST ]
