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ST10F276S-4T3 参数 Datasheet PDF下载

ST10F276S-4T3图片预览
型号: ST10F276S-4T3
PDF下载: 下载PDF文件 查看货源
内容描述: 16位MCU与MAC单元832 KB的闪存和68 KB的RAM [16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM]
分类和应用: 闪存
文件页数/大小: 235 页 / 2491 K
品牌: STMICROELECTRONICS [ ST ]
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Register set  
ST10F276E  
When CAN1, CAN2, RTC, XASC, XSSC, I2C, XPWM and the XBUS Additional Features are  
all disabled via XPERCON setting, then any access in the address range 00’E800h -  
00’EFFFh is directed to external memory interface, using the BUSCONx register  
corresponding to the address matching ADDRSELx register. All pins used for X-Peripherals  
can be used as General Purpose I/O whenever the related module is not enabled.  
The default XPER selection after Reset is such that CAN1 is enabled, CAN2 is disabled,  
XRAM1 (2 Kbyte XRAM) is enabled and XRAM2 (64 Kbyte XRAM) is disabled; all the other  
X-Peripherals are disabled after Reset.  
Register XPERCON cannot be changed after the global enabling of X-Peripherals, that is,  
after setting of bit XPEN in SYSCON register.  
In Emulation mode, all the X-Peripherals are enabled (XPERCON bits are all set). The  
bondout chip determines whether or not to redirect an access to external memory or to  
XBUS.  
Reserved bits of XPERCON register are always written to ‘0’.  
Table 85 below summarizes the Segment 8 mapping that depends upon the EA pin status  
during reset as well as the SYSCON (bit XPEN) and XPERCON (bits XRAM2EN and  
XFLASHEN) registers user programmed values.  
.
Table 85. Segment 8 address range mapping  
EA  
XPEN  
XRAM2EN  
XFLASHEN  
Segment 8  
External memory  
0
0
0
0
1
0
1
1
1
x
x
0
1
x
x
x
0
x
1
x
External memory  
Reserved  
Reserved  
IFlash (B1F1)  
Note:  
The symbol “x” in the table above stands for “do not care”.  
22.12  
XPERCON and XPEREMU registers  
As already mentioned, the XPERCON register must be programmed to enable the single  
XBUS modules separately. The XPERCON is a read/write ESFR register; the XPEREMU  
register is a write-only register mapped on XBUS memory space (address EB7Eh).  
Once the XPEN bit of SYSCON register is set and at least one of the X-peripherals (except  
memories) is activated, the register XPEREMU must be written with the same content of  
XPERCON: This is mandatory in order to allow a correct emulation of the new set of  
features introduced on XBUS for the new ST10 generation. The following instructions must  
be added inside the initialization routine:  
if (SYSCON.XPEN && (XPERCON & 0x07D3))  
then { XPEREMU = XPERCON }  
Of course, XPEREMU must be programmed after XPERCON and after SYSCON; in this  
way the final configuration for X-Peripherals is stored in XPEREMU and used for the  
emulation hardware setup.  
176/235  
Doc ID 12303 Rev 3  
 
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