M59PW1282
Table 8. Status Register Bits
(1)
P/E.C. Status
Programming
Waiting for data
Program fail
Address
DQ7
–
DQ6
DQ5 DQ4 DQ3
DQ2
DQ0
Command
–
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
0
0
1
0
1
0
–
0
0
0
0
0
1
–
1
0
1
–
–
–
Multiple Word
Program
–
–
–
–
(2)
–
–
–
Programming
Program error
–
DQ7
DQ7
0
–
–
–
Word Program
(2)
–
In erasing block
–
–
Toggle
Erasing
Not in
erasing block
0
0
0
Toggle
Toggle
Toggle
0
1
1
1
1
1
No Toggle
Toggle
–
–
–
Chip Erase/
Block Erase
(2)
(2)
In failed block
Erase fail
Not in
failed block
No Toggle
Note: 1. Unspecified data bits should be ignored.
2. DQ4 = 0 if V ≥ V during Program/Erase algorithm execution; DQ4 = 1 if V < V during Program/Erase algorithm execution.
PP
HH
PP
HH
Figure 8. Data Polling Flowchart
Figure 9. Data Toggle Flowchart
START
START
READ
DQ5 & DQ6
READ DQ5 & DQ7
at VALID ADDRESS
READ DQ6
DQ7
=
DATA
YES
DQ6
NO
=
NO
TOGGLE
YES
NO
DQ5
= 1
NO
DQ5
YES
= 1
YES
READ DQ7
at VALID ADDRESS
READ DQ6
TWICE
DQ7
=
DATA
YES
DQ6
=
NO
NO
FAIL
TOGGLE
PASS
YES
FAIL
PASS
AI03598
AI01370B
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