8 Mbit Firmware Hub
SST49LF008A
Data Sheet
DC Characteristics
TABLE 10: DC Operating Characteristics (All Interfaces)
Limits
Symbol Parameter
IDD Active VDD Current
Min
Max
Units Test Conditions1
LCLK (FWH mode) and Address Input (PP mode)=VILT/VIHT
at f=33 MHz (FWH mode) or 1/TRC min (PP Mode)
All other inputs=VIL or VIH
Read
Write2
12
24
mA All outputs = open, VDD=VDD Max
mA See Note3
ISB
Standby VDD Current
(FWH Interface)
100
µA
LCLK (FWH mode) and Address Input (PP mode)=VILT/VIHT
at f=33 MHz (FWH mode) or 1/TRC min (PP Mode)
LFRAME#=0.9 VDD, f=33 MHz, CE#=0.9 VDD
,
VDD=VDD Max, All other inputs ≥ 0.9 VDD or ≤ 0.1 VDD
4
IRY
Ready Mode VDD Current
(FWH Interface)
10
mA LCLK (FWH mode) and Address Input (PP mode)=VILT/VIHT
at f=33 MHz (FWH mode) or 1/TRC min (PP Mode)
LFRAME#=VIL, f=33 MHz, VDD=VDD Max
All other inputs ≥ 0.9 VDD or ≤ 0.1 VDD
II
Input Current for IC,
ID [3:0] pins
200
µA
VIN=GND to VDD, VDD=VDD Max
ILI
Input Leakage Current
Output Leakage Current
INIT# Input High Voltage
INIT# Input Low Voltage
Input Low Voltage
1
1
µA
µA
V
VIN=GND to VDD, VDD=VDD Max
VOUT=GND to VDD, VDD=VDD Max
VDD=VDD Max
ILO
VIHI
5
1.0
-0.5
-0.5
VDD+0.5
0.4
5
VILI
VIL
V
VDD=VDD Min
0.3 VDD
V
VDD=VDD Min
VIH
VOL
Input High Voltage
0.5 VDD VDD+0.5
0.1 VDD
V
VDD=VDD Max
Output Low Voltage
Output High Voltage
V
IOL=1500µA, VDD=VDD Min
IOH=-500 µA, VDD=VDD Min
VOH
0.9 VDD
V
T10.10 1161
1. Test conditions apply to PP mode.
2. IDD active while Erase or Program is in progress.
3. For PP Mode: OE# = WE# = VIH; For FWH mode: f = 1/TRC min, LFRAME# = VIH, CE# = VIL.
4. The device is in Ready Mode when no activity is on the FWH bus.
5. Do not violate processor or chipset specification regarding INIT# voltage.
©2006 Silicon Storage Technology, Inc.
S71161-11-000
3/06
22
SST [ SILICON STORAGE TECHNOLOGY, INC ]
