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SST25VF064C-80-4C-SAE 参数 Datasheet PDF下载

SST25VF064C-80-4C-SAE图片预览
型号: SST25VF064C-80-4C-SAE
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位的SPI串行双I / O闪存 [64 Mbit SPI Serial Dual I/O Flash]
分类和应用: 闪存
文件页数/大小: 31 页 / 903 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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64 Mbit SPI Serial Dual I/O Flash  
SST25VF064C  
Data Sheet  
Sector-Erase  
The Sector-Erase instruction clears all bits in the selected 4  
KByte sector to FFH. A Sector-Erase instruction applied to  
a protected memory area will be ignored. Prior to any Write  
operation, the Write-Enable (WREN) instruction must be  
executed. CE# must remain active low for the duration of  
any command sequence. The Sector-Erase instruction is  
initiated by executing an 8-bit command, 20H, followed by  
address bits A23-A0. Address bits AMS-A12 (AMS = Most  
Significant address) are used to determine the sector  
address (SAX), remaining address bits can be VIL or VIH.  
CE# must be driven high before the instruction is executed.  
Poll the Busy bit in the software status register or wait TSE  
for the completion of the internal self-timed Sector-Erase  
cycle. See Figure 12 for the Sector-Erase sequence.  
CE#  
MODE 3  
0
1
2
3
4
5
6
7
8
15 16  
23  
31  
24  
MODE 0  
SCK  
20  
ADD.  
MSB  
ADD.  
ADD.  
SI  
MSB  
HIGH IMPEDANCE  
SO  
1392 F13.0  
FIGURE 12: Sector-Erase Sequence  
©2010 Silicon Storage Technology, Inc.  
S71392-04-000  
04/10  
15  
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