64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
Data Sheet
Page-Program
The page-Program instruction programs up to 256 bytes of
data in the memory. The selected page address must be in
the erased state (FFH) before initiating the Page-Program
operation. A Page-Program applied to a protected memory
area will be ignored.
wait TPP for the completion of the internal self-timed Page-
Program operation. See Figure 10 for the Page-Program
sequence.
For Page-Program, the memory range for SST25VF064C
is set in 256 byte page boundaries. The device handles
shifting of more than 256 bytes of data by keeping the last
256 bytes of data shifted as the correct data to be pro-
grammed. If the target address for the Page-Program
instruction is not the beginning of the page boundary (A7-
A0 are not all zero) and the number of data input exceeds
or overlaps the end of the address of the page boundary,
the excess data inputs will wrap around and will be pro-
grammed at the start of that target page.
Prior to the program operation, the Write-Enabled (WREN)
instruction must be executed. CE# must remain active low
for the duration of the Page-Program instruction. The Page-
Program instruction is initiated by executing an 8-bit com-
mand, 02H, followed by address bits A23-A0. Following the
address, at least one byte is needed for the data input. CE#
must be driven high before the instruction is executed. The
user may poll the Busy bit in the software status register or
CE#
MODE 3
0
1
2
3
4
5
6
7
8
15 16
23 24
31 32
39
SCK
SI
MODE 0
02
ADD.
MSB
ADD.
ADD.
LSB
Data Byte 1
LSB
MSB
MSB
LSB
SO
HIGH IMPEDANCE
CE#
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
SCK
SI
Data Byte 256
Data Byte 2
Data Byte 3
MSB
MSB
MSB
LSB
LSB
LSB
SO
HIGH IMPEDANCE
1392 F30.0
FIGURE 10: Page-Program Sequence
©2010 Silicon Storage Technology, Inc.
S71392-04-000
04/10
13
SST [ SILICON STORAGE TECHNOLOGY, INC ]
