16 Mbit SPI Serial Flash
SST25VF016B
A Microchip Technology Company
Data Sheet
Pin Description
1
2
3
4
8
7
6
5
CE#
SO
V
DD
1
2
3
4
8
7
6
5
CE#
V
DD
HOLD#
SCK
SI
SO
HOLD#
SCK
SI
Top View
Top View
WP#
WP#
V
V
SS
SS
1271 08-wson QA P2.0
1271 08-soic S2A P1.0
8-Lead SOIC
8-Contact WSON
Figure 2: Pin Assignments
Table 1: Pin Description
Symbol Pin Name
Functions
SCK
Serial Clock
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock
input, while output data is shifted out on the falling edge of the clock input.
SI
Serial Data Input
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
SO
Serial Data Output To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
Outputs Flash busy status during AAI Programming when reconfigured as RY/
BY# pin. See “Hardware End-of-Write Detection” on page 12 for details.
CE#
Chip Enable
Write Protect
The device is enabled by a high to low transition on CE#. CE# must remain low for
the duration of any command sequence.
WP#
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status regis-
ter.
HOLD# Hold
To temporarily stop serial communication with SPI flash memory without resetting
the device.
VDD
VSS
Power Supply
Ground
To provide power supply voltage: 2.7-3.6V for SST25VF016B
T1.0 1271
©2011 Silicon Storage Technology, Inc.
S71271-04-000
01/11
4
SST [ SILICON STORAGE TECHNOLOGY, INC ]
