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89E52RD2-40-C-NJE 参数 Datasheet PDF下载

89E52RD2-40-C-NJE图片预览
型号: 89E52RD2-40-C-NJE
PDF下载: 下载PDF文件 查看货源
内容描述: 8位8051 Compatibale单片机(MCU)与嵌入式超快闪记忆 [8 bit 8051-Compatibale Microcontroller (MCU) with Embedded SuperFlash Memory]
分类和应用: 微控制器
文件页数/大小: 91 页 / 969 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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FlashFlex51 MCU  
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2  
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2  
Preliminary Specifications  
4.1.1 Product Identification  
Program commands, which are synchronized internally.  
The Read commands are asynchronous reads, indepen-  
dent of the PROG# signal level.  
The Read-ID command accesses the Signature Bytes that  
identify the device and the manufacturer as SST. External  
programmers primarily use these Signature Bytes in the  
selection of programming algorithms. The Read-ID com-  
mand is selected by the command code of 0H on P3[7:6]  
and P2[7:6]. See Figure 14-14 for timing waveforms.  
A detailed description of the external host mode com-  
mands follows.  
The Select-Block0 command enables Block 0 to be pro-  
grammed in external host mode. Once this command is  
executed, all subsequent external host Commands will be  
directed at Block 0. See Figure 14-15 for timing waveforms.  
TABLE  
4-3: PRODUCT IDENTIFICATION  
Address  
Data  
The Select-Block1 command enables Block 1 (8 KByte  
Block) to be programmed. Once this command is exe-  
cuted, all subsequent external host Commands that are  
directed to the address range below 2000H will be directed  
at Block 1. The Select-Block1 command only affects the  
lowest 8 KByte of the program address space. For  
addresses greater than or equal to 2000H, Block 0 is  
accessed by default. Upon entering external host mode,  
Block 1 is selected by default.  
Manufacturer’s ID  
Device ID  
30H  
BFH  
SST89E52RD2  
SST89V52RD2  
SST89E54RD2  
SST89V54RD2  
SST89E58RD2  
SST89V58RD2  
SST89E516RD2  
SST89V516RD2  
31H  
31H  
31H  
31H  
31H  
31H  
31H  
31H  
9CH  
9DH  
9EH  
9FH  
9BH  
9AH  
92H  
The Chip-Erase, Block-Erase, and Sector-Erase com-  
mands are used for erasing all or part of the memory array.  
Erased data bytes in the memory array will be erased to  
FFH. Memory locations that are to be programmed must  
be in the erased state prior to programming.  
93H  
T4-3.0 1255  
4.1.2 Arming Command  
The Chip-Erase command erases all bytes in both memory  
blocks, regardless of any previous Select-Block0 or Select-  
Block1 commands. Chip-Erase ignores the Security Lock  
status and will erase the Security Lock, returning the device  
to its Unlocked state. The Chip-Erase command will also  
erase the SC0 bit. Upon completion of the Chip-Erase  
command, Block 1 will be the selected block. See Figure  
14-16 for timing waveforms.  
An arming command sequence must take place before  
any external host mode sequence command is recognized  
by the device. This prevents accidental triggering of exter-  
nal host mode commands due to noise or programmer  
error. The arming command is as follows:  
1. PSEN# goes low while RST is high. This will get  
the machine in external host mode, re-configuring  
the pins, and turning on the on-chip oscillator.  
The Block-Erase command erases all bytes in the selected  
memory blocks. This command will not be executed if the  
security lock is enabled. The selection of the memory block  
to be erased is determined by the prior execution Select-  
Block0 or Select-Block1 command. See Figure 14-18 for  
the timing waveforms.  
2. A Read-ID command is issued, and after 1 ms the  
external host mode commands can be issued.  
After the above sequence, all other external host mode  
commands are enabled. Before the Read-ID command is  
received, all other external host mode commands received  
are ignored.  
The Sector-Erase command erases all of the bytes in a  
sector. The sector size for the flash memory is 128 Bytes.  
This command will not be executed if the Security lock is  
enabled. See Figure 14-19 for timing waveforms.  
4.1.3 External Host Mode Commands  
The external host mode commands are Read-ID, Chip-  
Erase, Block-Erase, Sector-Erase, Byte-Program, Byte-  
Verify, Prog-SB1, Prog-SB2, Prog-SB3, Prog-SC0, Prog-  
SC1, Select-Block0, Select-Block1. See Table 4-1 for all  
signal logic assignments, Figure 4-1 for I/O pin assign-  
ments, and Table 14-11 for the timing parameters. The criti-  
cal timing for all Erase and Program commands is  
generated by an on-chip flash memory controller. The high-  
to-low transition of the PROG# signal initiates the Erase or  
The Byte-Program command is used for programming new  
data into the memory array. Programming will not take  
place if any security locks are enabled. See Figure 14-20  
for timing waveforms.  
The Byte-Verify command allows the user to verify that the  
device correctly performed an Erase or Program com-  
mand. This command will be disabled if any security locks  
are enabled. See Figure 14-23 for timing waveforms.  
©2004 Silicon Storage Technology, Inc.  
S71255-00-000  
3/04  
37  
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